IP Library Granted Patent US 8,005,105
Granted Patent B2
US 8,005,105 · App. 12/473,150 · Granted Aug 23, 2011

Method and system for configuring fibre channel ports

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Quick Facts
Patent No.
US 8,005,105
App. No.
12/473,150
Granted
Aug 23, 2011
Kind
B2
Abstract

A fiber channel switch element for routing fiber channel frame is provided. The switch element includes a fiber channel port that can be configured to support plural data transfer rates. The data transfer rate may be 1 G, 2 G, 4 G, 8 G or 10 G. The switch element includes a clock configuration module for providing a clock signal that is based on the data transfer rate. A receive segment of the fiber channel port sends a signal to a transmit segment to avoid an under flow condition. The receive segment also waits for a certain frame length after a fiber channel frame is written and before the fiber channel frame is read, depending upon a data transfer rate of a source port. Multiple lanes may be configured as a single 10 G multi lane port or as multiple individual ports.

Claims (27)

1. A switch element for routing information, comprising:

a port that is configured to operate at one or more of a plurality of data transfer rates;

wherein a clock rate for one data transfer rate is not an integer multiple of a clock rate for another data transfer rate at which the same port is configured to operate;

wherein the same port uses one interface to support one or more lanes for receiving and transferring information at the plurality of data transfer rates; and the one interface includes a plurality of selectable serial/de-serializer (SERDES), where a higher number of SERDES and a higher number of lanes are selected for a first data transfer rate, and a lower number of SERDES and a lower number of lanes are selected for supporting a second data transfer rate, where the first data transfer rate is higher than the second data transfer rate.

2. The element of claim 1 , wherein the one data transfer rate is 1 G (gigabit per second).

3. The switch element of claim 1 , wherein the one data transfer rate is 2 G (gigabit per second).

4. The switch element of claim 1 , wherein the one data transfer rate is 4 G (gigabit per second).

5. The switch element of claim 1 , wherein the one data transfer rate is 8 G (gigabit per second).

6. The switch element of claim 1 , wherein the one data transfer rate is equal to or greater 10 G (gigabit per second).

7. The switch element of claim 1 , wherein the switch element includes a clock configuration module for providing a clock signal that is based on a configured data transfer rate for the same port.

8. The switch element of claim 1 , wherein when a source port is operating at a lower data transfer rate than a destination port, a receive segment of the port sends a signal to a transmit segment to avoid an under flow condition.

9. The switch element of claim 8 , wherein the receive segment waits for a certain frame length after a frame is written and before the frame is read for transmission, where the certain frame length depends upon a data transfer rate of the source port and the destination port.

10. The switch element of claim 1 , wherein multiple lanes are configured for the port to operate as a single 10 G multi lane port and the same port uses the multiple lanes for the same port to operate as a different port at a rate lower than 10 G.

11. he switch element of claim 1 , wherein same transmit and receive pipelines are used by the same port configured to operate at different speeds.

12. The switch element of claim 1 , wherein transmit and receive pipelines are selected from a plurality of receive pipelines and transmit pipelines, depending upon a data transfer rate at which the port is configured to operate.

13. The switch element of claim 1 , wherein a receive buffer for the port is shared by multiple lanes, when the port is configured to operate at different rates.

14. The switch element of claim 1 , wherein a separate receive buffer is used for each of the plurality of lanes when the same port is configured to operate at different rates.

15. The switch element of claim 1 , wherein each of the plurality of lanes is configured to operate at a different rate depending on the configuration of the port.

16. The switch element of claim 1 , wherein the port auto-negotiates with other ports, the rate at which the configurable port is operating.

17. A switch element for routing network frames, comprising:

a port that is configured to operate at one or more of a plurality of data transfer rates;

wherein a clock rate for one data transfer rate is not an even multiple of a clock rate for another data transfer rate at which the port is configured to operate;

wherein the port uses one interface to support one or more lanes for receiving and transferring frames at the plurality of data transfer rates; and the one interface includes a plurality of selectable serial/de-serializer (SERDES); and

wherein a higher number of SERDES and a higher number of lanes are selected for a first data transfer rate, and a lower number of SERDES and a lower number of lanes are selected for supporting a second data transfer rate, where the first data transfer rate is higher than the second data transfer rate; and wherein the switch element includes a clock configuration module for providing a clock signal that is based on a configured data transfer rate for the port.

18. The switch element of claim 17 , wherein each of the plurality of lanes is configured to operate at a different rate depending on the configuration of the port.

19. The switch element of claim 17 , wherein the data transfer rate is one or more of 1 G (gigabit per second); 2 G, 4 G, 8 G, 10 G or higher than 10 G.

20. The switch element of claim 17 , wherein the port auto-negotiates the rate at which it is operating with other ports.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2020
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE, LTD.
Reel/Frame 053179/0320 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2020
From: CAVIUM, LLC
To: CAVIUM INTERNATIONAL
Reel/Frame 051948/0807 →
CHANGE OF NAME Recorded Oct 8, 2018
From: CAVIUM, INC.
To: CAVIUM, LLC
Reel/Frame 047205/0953 →
RELEASE OF SECURITY INTEREST Recorded Jul 6, 2018
From: JP MORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: CAVIUM, INC; CAVIUM NETWORKS LLC; QLOGIC CORPORATION
Reel/Frame 046496/0001 →
MERGER Recorded Oct 18, 2017
From: QLOGIC CORPORATION
To: CAVIUM, INC.
Reel/Frame 044812/0504 →
SECURITY AGREEMENT Recorded Mar 1, 2017
From: QLOGIC CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 041854/0119 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2010
From: DROPPS, FRANK R.; PAPENFUSS, GARY M.; KOHLWEY, ERNEST G.
To: QLOGIC, CORPORATION
Reel/Frame 025534/0151 →