IP Library Granted Patent US 8,119,517
Granted Patent B2
US 8,119,517 · App. 12/477,332 · Granted Feb 21, 2012

Chemical mechanical polishing method and method of manufacturing semiconductor device

Assignees: JSR Corporation; Kabushiki Kaisha Toshiba
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Quick Facts
Patent No.
US 8,119,517
App. No.
12/477,332
Granted
Feb 21, 2012
Kind
B2
Abstract

A chemical mechanical polishing method comprises polishing an organic film using a slurry including polymer particles having a surface functional group and a water-soluble polymer.

Claims (59)

1. A method of manufacturing a semiconductor device comprising:

forming an insulating film on a substrate;

forming a hollow portion in the insulating film;

forming a lower-layer film, an intermediate layer, and a resist film in that order on the insulating film in which the hollow portion has been formed;

subjecting the resist film to pattern exposure;

wherein the forming the lower-layer film comprises:

forming an organic film on the insulating film in which the hollow portion is formed by applying a material comprising a novolac resin as a main component so that the hollow portion is filled with the organic film and baking the material at a temperature between 90 and 160° C.; and

chemically and mechanically polishing the organic film using a slurry comprising polymer particles having a surface functional group and a water soluble polymer to planarize the organic film.

2. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the surface functional group is at least one functional group selected from the group consisting of an anionic functional group, a cationic functional group, an ampholytic functional group, and a nonionic functional group.

3. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the polymer particles comprise at least one resin selected from the group consisting of an acrylic resin, a polystyrene resin, a urea resin, a melamine resin, a polyacetal resin, a polycarbonate resin, and a composite thereof.

4. A method of manufacturing a semiconductor device comprising:

forming an insulating film on a substrate;

forming a hollow portion in the insulating film;

forming a lower-layer film comprising first and second organic films, an intermediate layer, and a resist film in that order on the insulating film in which the hollow portion has been formed;

subjecting the resist film to pattern exposure;

wherein the forming the lower-layer film comprises:

forming the first organic film on the insulating film in which the hollow portion is formed by applying a material comprising a novolac resin as a main component so that the hollow portion is filled with the first organic film and baking the material at a temperature between 90 and 160° C.; and

chemically and mechanically polishing the first organic film using a slurry comprising polymer particles having a surface functional group and a water soluble polymer to planarize the first organic film; and

forming the second organic film over the insulating film and the first organic film after the planarization.

5. The method of manufacturing a semiconductor device according to claim 4 ,

wherein the method further comprises baking the first and second organic films at a second temperature between 250 and 400° C.

6. The method of manufacturing a semiconductor device according to claim 4 ,

wherein the surface functional group is at least one functional group selected from the group consisting of an anionic functional group, a cationic functional group, an ampholytic functional group, and a nonionic functional group.

7. The method of manufacturing a semiconductor device according to claim 4 ,

wherein the polymer particles comprise at least one resin selected from the group consisting of an acrylic resin, a polystyrene resin, a urea resin, a melamine resin, a polyacetal resin, a polycarbonate resin, and a composite thereof.

8. A method of manufacturing a semiconductor device comprising:

forming an organic insulating film comprising an organic material on a substrate;

stacking first and second hard masks comprising an inorganic material on the organic insulating film;

forming a hollow portion in the second hard mask;

forming a lower-layer film comprising first and second organic films, an intermediate layer, and a resist film in that order on the second hard mask in which the hollow portion has been formed;

subjecting the resist film to pattern exposure;

wherein the forming the lower-layer film comprises:

forming the first organic film on the second hard mask in which the hollow portion is formed by applying a material comprising a novolac resin as a main component so that the hollow portion is filled with the first organic film and baking the material at a temperature between 90 and 160° C.; and

chemically and mechanically polishing the first organic film using a slurry comprising polymer particles having a surface functional group and a water soluble polymer to planarize the first organic film; and

forming the second organic film over the second hard mask and the first organic film after the planarization.

9. The method of manufacturing a semiconductor device according to claim 8 ,

wherein the method further comprises baking the first and second organic films at a second temperature between 250 and 400° C.

10. The method of manufacturing a semiconductor device according to claim 8 ,

wherein the surface functional group is at least one functional group selected from the group consisting of an anionic functional group, a cationic functional group, an ampholytic functional group, and a nonionic functional group.

11. The method of manufacturing a semiconductor device according to claim 8 ,

wherein the polymer particles comprise at least one resin selected from the group consisting of an acrylic resin, a polystyrene resin, a urea resin, a melamine resin, a polyacetal resin, a polycarbonate resin, and a composite thereof.

12. A method of manufacturing a semiconductor device comprising:

forming an organic insulating film comprising an organic material on a substrate;

stacking first, second, and third hard masks comprising an inorganic material on the organic insulating film;

forming a hollow portion in the third hard mask;

forming a lower-layer film comprising first and second organic films, an intermediate layer, and a resist film in that order on the third hard mask in which the hollow portion has been formed;

subjecting the resist film to pattern exposure;

wherein the forming the lower-layer film comprises:

forming the first organic film on the third hard mask in which the hollow portion is formed by applying a material comprising a novolac resin as a main component so that the hollow portion is filled with the first organic film and baking the material at a temperature between 90 and 160° C.; and

chemically and mechanically polishing the first organic film using a slurry comprising polymer particles having a surface functional group and a water soluble polymer to planarize the first organic film; and

forming the second organic film over the third hard mask and the first organic film after the planarization.

13. The method of manufacturing a semiconductor device according to claim 12 ,

wherein the method further comprises baking the first and second organic films at a second temperature between 250 and 400° C.

14. The method of manufacturing a semiconductor device according to claim 12 ,

wherein the surface functional group is at least one functional group selected from the group consisting of an anionic functional group, a cationic functional group, an ampholytic functional group, and a nonionic functional group.

15. The method of manufacturing a semiconductor device according to claim 12 ,

wherein the polymer particles comprise at least one resin selected from the group consisting of an acrylic resin, a polystyrene resin, a urea resin, a melamine resin, a polyacetal resin, a polycarbonate resin, and a composite thereof.

Assignments (4)
CHANGE OF NAME Recorded Feb 11, 2022
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 059039/0123 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2022
From: K.K.PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 058922/0308 →
MERGER Recorded Jan 20, 2022
From: TOSHIBA MEMORY CORPORATION
To: K.K.PANGEA
Reel/Frame 058788/0338 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 28, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043727/0167 →
Priority Claims (1)
JP 2005-345790 · Nov 30, 2005 · national
Continuity (2)
Division 11563414 · Nov 27, 2006
Related Publication 20090239373A1 · Sep 24, 2009