Mesa type semiconductor device and manufacturing method thereof
View Patent ↗This invention is directed to solving problems with a mesa type semiconductor device, which are deterioration in a withstand voltage and occurrence of a leakage current caused by reduced thickness of a second insulation film on an inner wall of a mesa groove corresponding to a PN junction, and offers a mesa type semiconductor device of high withstand voltage and high reliability and its manufacturing method. After the mesa groove is formed by dry-etching, wet-etching with an etching solution including hydrofluoric acid and nitric acid is further applied to a sidewall of the mesa groove to form an overhang made of the first insulation film above an upper portion of the mesa groove. The overhang serves as a barrier to prevent the second insulation film formed in the mesa groove and on the first insulation film around the mesa groove beyond an area of the overhang from flowing toward a bottom of the mesa groove due to an increased fluidity resulting from a subsequent thermal treatment. As a result, the inner wall of the mesa groove corresponding to the PN junction is covered with the second insulation film thick enough to secure a desired withstand voltage and to reduce a leakage current.
1. A mesa type semiconductor device comprising:
a semiconductor substrate of a first general conductivity type;
a first semiconductor layer of the first general conductivity type disposed on the semiconductor substrate, an impurity concentration of the first semiconductor layer being lower than an impurity concentration of the semiconductor substrate;
a second semiconductor layer of a second general conductivity type disposed on the first semiconductor layer so as to form a PN junction between the first and second semiconductor layers;
a mesa groove penetrating into the semiconductor substrate through the first and second semiconductor layers;
a first insulation film disposed on the second semiconductor layer so that an edge portion of the first insulation film overhangs the mesa groove, the first insulation film not extending into the mesa groove so far as to reach the first semiconductor layer; and
a second insulation film disposed on a sidewall of the mesa groove and hanging from the overhanging first insulation film,
wherein the overhanging edge portion of the first insulation film has a bottom surface facing the second semiconductor layer and a top surface opposite from the bottom surface, and the second insulation film is in contact with both the top surface and the bottom surface of the first insulation film.
2. The mesa type semiconductor device of claim 1 , wherein the second insulation film over the PN junction is thick enough to secure a predetermined withstand voltage.
3. The mesa type semiconductor device of claim 2 , wherein the first insulation film comprises a silicon oxide film or a silicon nitride film.
4. The mesa type semiconductor device of claim 2 , wherein the second insulation film comprises a stack of a polyimide film and a silicon nitride film.
5. The mesa type semiconductor device of claim 2 , wherein the second insulation film comprises a polyimide, an epoxy resin, a combination of a polyimide and an epoxy resin or a combination of a polyimide and an organic resist.
6. The mesa type semiconductor device of claim 1 , wherein the first insulation film comprises a silicon oxide film or a silicon nitride film.
7. The mesa type, semiconductor device of claim 1 , wherein the second insulation film comprises a stack of a polyimide film and a silicon nitride film.
8. The mesa type semiconductor device of claim 1 , wherein the second insulation film comprises a polyimide, an epoxy resin, a combination of a polyimide and an epoxy resin or a combination of a polyimide and an organic resist.
9. The mesa type semiconductor device of claim 1 , wherein a lateral length of the mesa groove at the second semiconductor layer is larger than a lateral length of the mesa groove at the first semiconductor layer.
10. The mesa type semiconductor device of claim 9 , wherein the lateral length of the mesa groove at the second semiconductor layer is larger than the lateral length of the mesa groove at the first semiconductor layer by 4 μm or more.
11. The mesa type semiconductor device of claim 1 , wherein the second insulation film is thicker at the PN junction than at a portion of the mesa groove lower than the PN junction.