Semiconductor device and method of forming conductive vias with trench in saw street
View Patent ↗A semiconductor wafer has a plurality of semiconductor die separated by a peripheral region. A trench is formed in the peripheral region of the wafer. A via is formed the die. The trench extends to and is continuous with the via. A first conductive layer is deposited in the trench and via to form conductive TSV. The first conductive layer is conformally applied or completely fills the trench and via. The trench has a larger area than the vias which accelerates formation of the first conductive layer. A second conductive layer is deposited over a front surface of the die. The second conductive layer is electrically connected to the first conductive layer. The first and second conductive layers can be formed simultaneously. A portion of a back surface of the wafer is removed to expose the first conductive layer. The die can be stacked and electrically interconnected through the TSVs.
1. A method of making a semiconductor device, comprising:
providing a semiconductor wafer having a plurality of semiconductor die separated by a peripheral region;
forming a plurality of vias partially through the semiconductor die;
forming a trench partially through the peripheral region of the semiconductor wafer, the trench being continuous with the vias;
forming an insulating layer in the trench and vias;
depositing a first conductive layer over the insulating layer in the trench and vias to form conductive through silicon vias (TSV);
depositing a second conductive layer over a front surface of the semiconductor die, the second conductive layer being electrically connected between the first conductive layer and a contact pad on the semiconductor die; and
removing a portion of a back surface of the semiconductor wafer opposite the front surface of the semiconductor wafer to expose the first conductive layer.
2. The method of claim 1 , wherein the trench has a larger area than the vias which accelerates formation of the first conductive layer.
3. The method of claim 1 , further including forming the first and second conductive layers simultaneously.
4. The method of claim 1 , further including completely filling the trench with the first conductive layer.
5. The method of claim 1 , further including:
stacking a plurality of semiconductor die; and
electrically interconnecting the plurality of semiconductor die through the TSV.
6. The method of claim 1 , wherein the trench and vias are formed through at least 10 percent of a thickness of the semiconductor wafer.
7. The method of claim 1 , further including singulating through the peripheral region to separate the semiconductor die while leaving a portion of the first conductive layer in the vias to form the conductive TSV.
8. A method of making a semiconductor device, comprising:
providing a semiconductor wafer having a plurality of semiconductor die separated by a peripheral region;
forming a plurality of vias partially through the semiconductor wafer;
forming a trench partially through the peripheral region of the semiconductor wafer, the trench being continuous with the vias;
depositing a first conductive layer in the trench and vias to form conductive vias;
depositing a second conductive layer over a front surface of the semiconductor die, the second conductive layer being electrically connected to the first conductive layer; and
removing a portion of a back surface of the semiconductor wafer opposite the front surface of the semiconductor wafer to expose the first conductive layer.
9. The method of claim 8 , wherein the trench has a larger area than the vias which accelerates formation of the first conductive layer.
10. The method of claim 8 , further including singulating through the peripheral region to separate the semiconductor die while leaving a portion of the first conductive layer in the vias to form the conductive vias.
11. The method of claim 8 , further including forming a third conductive layer on a backside of the semiconductor die, the third conductive layer being electrically connected to the conductive vias.
12. The method of claim 8 , further including completely filling the trench with the first conductive layer.
13. The method of claim 8 , further including conformally applying the first conductive layer in the trench.
14. The method of claim 8 , further including:
stacking a plurality of semiconductor die; and
electrically interconnecting the plurality of semiconductor die through the conductive vias.
15. The method of claim 8 , wherein the trench and vias are formed through at least 10 percent of a thickness of the semiconductor wafer.
16. A method of making a semiconductor device, comprising:
providing a semiconductor wafer having a plurality of semiconductor die containing an active region separated by a non-active peripheral region;
forming a plurality of vias through the semiconductor wafer partially within the active region and partially within the non-active peripheral region;
forming a trench along a length of the non-active peripheral region of the semiconductor wafer, the trench being continuous with the vias;
depositing a first conductive layer in the trench and vias to form conductive vias; and
removing a portion of a backside of the semiconductor wafer to expose the first conductive layer.
17. The method of claim 16 , further including forming an insulating layer in the trench and vias.
18. The method of claim 16 , further including depositing a second conductive layer over a surface of the semiconductor die, the second conductive layer being electrically connected to the first conductive layer.
19. The method of claim 16 , wherein the trench has a larger area than the vias which accelerates formation of the first conductive layer.
20. The method of claim 18 , further including forming the first and second conductive layers simultaneously.
21. The method of claim 16 , further including singulating through the peripheral region to separate the semiconductor die while leaving a portion of the first conductive layer in the vias to form the conductive vias.
22. The method of claim 16 , further including forming a third conductive layer on a backside of the semiconductor die, the third conductive layer being electrically connected to the conductive vias.
23. The method of claim 16 , further including completely filling the trench with the first conductive layer.
24. The method of claim 16 , further including conformally applying the first conductive layer in the trench.
25. The method of claim 16 , further including:
stacking a plurality of semiconductor die; and
electrically interconnecting the plurality of semiconductor die through the conductive vias.
26. A method of making a semiconductor device, comprising:
providing a semiconductor wafer having a plurality of semiconductor die containing an active region separated by a non-active peripheral region;
forming a plurality of vias through the semiconductor wafer partially within the active region;
forming a trench through the non-active peripheral region of the semiconductor wafer, the trench being continuous with the vias;
depositing a first conductive layer in the trench and vias to form conductive vias; and
removing a portion of a backside of the semiconductor wafer to expose the first conductive layer.
27. The method of claim 26 , further including forming an insulating layer in the trench and vias.
28. The method of claim 26 , further including depositing a second conductive layer over a surface of the semiconductor die, the second conductive layer being electrically connected to the first conductive layer.
29. The method of claim 28 , further including forming the first and second conductive layers simultaneously.
30. The method of claim 26 , wherein the trench has a larger area than the vias which accelerates formation of the first conductive layer.
31. The method of claim 26 , further including singulating through the peripheral region to separate the semiconductor die while leaving a portion of the first conductive layer in the vias to form the conductive vias.
32. The method of claim 26 , further including forming a third conductive layer on a backside of the semiconductor die, the third conductive layer being electrically connected to the conductive vias.
33. The method of claim 26 , further including completely filling the trench with the first conductive layer.
34. The method of claim 26 , further including conformally applying the first conductive layer in the trench.
35. The method of claim 26 , further including:
stacking a plurality of semiconductor die; and
electrically interconnecting the plurality of semiconductor die through the conductive vias.