Ternary valve input circuit
View Patent ↗A pull-up switching device for controlling connection and non-connection of an input terminal IN and a first supply VDD and a pull-down switching device for controlling connection and non-connection of the input terminal IN and a second supply VSS are provided. The pull-up switching device and the pull-down switching device are operated exclusively on and off in time division to hold and output the state of the input terminal during each operating state from the two output terminals.
1. A ternary value input circuit for converting and outputting three states of an input terminal into a combination of states of two output terminals, comprising:
a pull-up switching device for controlling connection and non-connection of said input terminal and a first power supply;
a pull-down switching device for controlling connection and non-connection of said input terminal and a second power supply; and
a pull signal generator circuit for generating a pull-up control signal for on and off control of said pull-up switching device and a pull-down control signal for on and off control of said pull-down switching device;
wherein said pull-up switching device and said pull-down switching device are operated exclusively on and off in time division to hold and output the state of said input terminal during each operating state from said two output terminals; and
wherein the pull signal generator circuit comprises:
a first NOT gate having an input terminal and an output terminal;
a buffer having an input terminal and an output terminal;
an OR gate having a first and second input terminals and an output terminal;
an AND gate having a first and second input terminals and an output terminal; and
a second NOT gate having an input terminal and an output terminal;
wherein the output terminal of the first NOT gate is connected to the input terminal of the buffer, the first input terminal of the OR gate, and the first input terminal of the AND gate;
the output terminal of the buffer is connected to the second input terminal of the OR gate and the second input terminal of the AND gate; and
the output terminal of the OR gate is connected to the output terminal of the NOT gate.
2. A ternary value input circuit according to claim 1 , comprising:
a pull-up output circuit for latching the state of said input terminal when said pull-up switching device is on and outputting from one of said two output terminals; and
a pull-down output circuit for latching the state of said input terminal when said pull-down switching device is on and outputting from the other of said two output terminals.
3. A ternary value input circuit according to claim 1 , wherein:
said pull signal generator circuit generates said pull-up control signal having a longer off period, which turns off said pull-up switching device, than an on period, which turns on said pull-up switching device.
4. A ternary value input circuit according to claim 1 , wherein:
said pull signal generator circuit generates said pull-down control signal having a longer off period, which turns off said pull-down switching device, than an on period, which turns on said pull-down switching device.
5. A ternary value input circuit for converting and outputting three states of an input terminal into a combination of states of two output terminals, comprising:
a pull-up switching device for controlling connection and non-connection of said input terminal and a first power supply;
a pull-down switching device for controlling connection and non-connection of said input terminal and a second power supply; and
a pull signal generator circuit for generating a pull-up control signal for on and off control of said pull-up switching device and a pull-down control signal for on and off control of said pull-down switching device;
a pull-up output circuit for latching the state of said input terminal when said pull-up switching device is on and an enable signal indicates an enable state, and outputting from one of said two output terminals; and
a pull-down output circuit for latching the state of said input terminal when said pull-down switching device is on and an enable signal indicates an enable state, and outputting from the other of said two output terminals;
wherein said pull-up switching device and said pull-down switching device are operated exclusively on and off in time division to hold and output the state of said input terminal during each operating state from said two output terminals
wherein the pull-up output circuit comprises:
a first AND gate having first and second input terminals and an output terminal;
a NOT gate having an input terminal and an output terminal;
a second AND gate having first and second input terminals and an output terminal;
a third AND gate having first and second input terminals and an output terminal;
an OR gate having first and second input terminals and an output terminal;
and a flip-flop having an input terminal and an output terminal;
wherein the enable signal is input into the first input terminal of the first AND gate;
a pull-up signal is input into the second input terminal of the first AND gate;
the output terminal of the first AND gate is connected to the input terminal of the NOT gate and the first input terminal of the third AND gate;
the output of a Schmitt trigger buffer is input into the second input terminal of the third AND gate;
the output terminal of the flip-flop is connected to the first input terminal of the second AND gate;
the output of the NOT gate is connected to the second input terminal of the second AND gate;
the output terminal of the second AND gate is connected to the first input terminal of the OR gate and the output terminal of the third AND gate is connected to the second input terminal of the OR gate; and
the output terminal of the OR gate is connected to the input terminal of the flip-flop.
6. A ternary value input circuit for converting and outputting three states of an input terminal into a combination of states of two output terminals, comprising:
a pull-up switching device for controlling connection and non-connection of said input terminal and a first power supply;
a pull-down switching device for controlling connection and non-connection of said input terminal and a second power supply; and
a pull signal generator circuit for generating a pull-up control signal for on and off control of said pull-up switching device and a pull-down control signal for on and off control of said pull-down switching device;
a pull-up output circuit for latching the state of said input terminal when said pull-up switching device is on and an enable signal indicates an enable state, and outputting from one of said two output terminals; and
a pull-down output circuit for latching the state of said input terminal when said pull-down switching device is on and an enable signal indicates an enable state, and outputting from the other of said two output terminals;
wherein said pull-up switching device and said pull-down switching device are operated exclusively on and off in time division to hold and output the state of said input terminal during each operating state from said two output terminals
wherein the pull-down output circuit comprises:
a first AND gate having first and second input terminals and an output terminal;
a NOT gate having an input terminal and an output terminal;
a second AND gate having first and second input terminals and an output terminal;
a third AND gate having first and second input terminals and an output terminal;
an OR gate having first and second input terminals and an output terminal;
and a flip-flop having an input terminal and an output terminal;
wherein the enable signal is input into the first input terminal of the first AND gate;
a pull-down signal is input into the second input terminal of the first AND gate;
the output terminal of the first AND gate is connected to the input terminal of the NOT gate and the second input terminal of the third AND gate;
the output of a Schmitt trigger buffer is input into the first input terminal of the third AND gate;
the output terminal of the flip-flop is connected to the first input terminal of the second AND gate;
the output of the NOT gate is connected to the second input terminal of the second AND gate;
the output terminal of the second AND gate is connected to the first input terminal of the OR gate and the output terminal of the third AND gate is connected to the second input terminal of the OR gate; and
the output terminal of the OR gate is connected to the input terminal of the flip-flop.