IP Library Granted Patent US 7,964,960
Granted Patent B2
US 7,964,960 · App. 12/500,735 · Granted Jun 21, 2011

Semiconductor device having non parallel cleavage planes in a substrate and supporting substrate

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Quick Facts
Patent No.
US 7,964,960
App. No.
12/500,735
Granted
Jun 21, 2011
Kind
B2
Abstract

The invention prevents a fracture parallel to a cleavage plane of a supporting substrate along a groove formed in the supporting substrate before dicing. A supporting substrate is attached to a front surface of a semiconductor substrate formed with an electronic device with an adhesive layer being interposed therebetween. In this supporting substrate, dicing lines are not parallel with cleavage planes which are perpendicular to the front surface of supporting substrate, i.e., a fifth cleavage plane and a sixth cleavage plane crossing perpendicularly thereto. A groove is then formed in the supporting substrate from the front surface to the middle thereof in the direction perpendicular to the front surface, along the dicing lines inside an opening provided in the semiconductor substrate. This groove is not parallel with the fifth cleavage plane and the sixth cleavage plane. After given processes, dicing is performed to the layered body of layers from the semiconductor substrate to the supporting substrate along the dicing lines.

Claims (16)

1. A semiconductor device comprising:

a semiconductor substrate comprising electronic devices formed on a front surface thereof;

a supporting substrate made of a single crystal semiconductor and attached to the semiconductor substrate;

an adhesive layer attaching the supporting substrate to the semiconductor substrate;

a protection film covering a back surface and a side surface of the semiconductor substrate and covering a portion of a side surface of the supporting substrate,

wherein in plan view of the semiconductor device the side surface of the supporting substrate extends along a direction that is not parallel with a cleavage plane of the supporting substrate, and

a lateral width of the supporting substrate is greater than a lateral width of the semiconductor substrate so that the side surface of the supporting substrate defines a lateral edge of the semiconductor device.

2. A semiconductor device comprising:

a semiconductor substrate comprising electronic devices formed on a front surface thereof;

a supporting substrate made of a single crystal silicon and attached to the semiconductor substrate;

an adhesive layer attaching the supporting substrate to the semiconductor substrate;

a protection film covering a back surface and a side surface of the semiconductor substrate and covering a portion of a side surface of the supporting substrate,

wherein a front surface and a back surface of the supporting substrate correspond to a cleavage plane of the single crystal silicon,

in plan view of the semiconductor device the side surface of the supporting substrate extends along a direction that is not parallel with a cleavage plane of the single crystal silicon, and

a lateral width of the supporting substrate is greater than a lateral width of the semiconductor substrate so that the side surface of the supporting substrate defines a lateral edge of the semiconductor device.

3. The semiconductor device of claim 2 , wherein the extending direction of the side surface of the supporting substrate and one of cleavage planes makes an angle of 5 to 45 degrees in the plan view of the semiconductor device.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR NAME PREVIOUSLY RECORDED AT REEL: 033813 FRAME: 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jan 21, 2015
From: SYSTEM SOLUTIONS CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 034816/0510 →
CHANGE OF NAME Recorded Dec 3, 2014
From: SANYO SEMICONDUCTOR CO., LTD
To: SYSTEM SOLUTIONS CO., LTD.
Reel/Frame 034537/0044 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2014
From: SANYO SEMICONDUCTOR CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033813/0420 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT #12/577882 PREVIOUSLY RECORDED ON REEL 026594 FRAME 0385. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2014
From: SANYO ELECTRIC CO., LTD
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 032836/0342 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2011
From: SANYO ELECTRIC CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 026594/0385 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 13, 2009
From: OHKUBO, NOBORU
To: SANYO ELECTRIC CO., LTD.; SANYO SEMICONDUCTOR CO., LTD.
Reel/Frame 022946/0806 →