SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR DEVICE

1 - 27 . (canceled)

28 . A semiconductor memory device that conducts a memory operation by trapping electric charges into a gate insulating film, wherein

the gate insulating film has a first insulating film that contains first impurities which tend to combine with oxygen in the insulating film and which are discrete at an atomic level.

29 . A semiconductor memory device that conducts a memory operation by trapping electric charges into a gate insulating film, the semiconductor memory device comprising:

a semiconductor substrate;

first and second impurities diffusion layers disposed in the semiconductor substrate;

a gate insulating film disposed on the semiconductor substrate; and

a first gate electrode disposed on the semiconductor substrate by way of the gate insulating film,

wherein the gate insulating film has a first insulating film that contains first impurities which tend to combine with oxygen in the insulating film and which are discrete at an atomic level.

30 . A semiconductor memory device that conducts a memory operation by trapping electric charges into a gate insulating film, the semiconductor memory device comprising:

a semiconductor substrate;

first and second impurities diffusion layers disposed in the semiconductor substrate;

a gate insulating film disposed on the semiconductor substrate; and

a first gate electrode disposed on the semiconductor substrate by way of the gate insulating film,

wherein the gate insulating film has:

a first insulating film that contains first impurities which tend to combine with oxygen in the insulating film and which are discrete at an atomic level; and

on a top and a bottom of the first insulating film, a silicon oxide film that does not contain the first impurities.

31 . A semiconductor memory device that conducts a memory operation by trapping electric charges into a gate insulating film, the semiconductor memory device comprising:

a semiconductor substrate;

first and second impurities diffusion layers disposed in the semiconductor substrate;

a gate insulating film disposed on the semiconductor substrate; and

a first gate electrode disposed on the semiconductor substrate by way of the gate insulating film,

wherein the gate insulating film has:

a first insulating film that contains first impurities which tend to combine with oxygen in the insulating film and which are discrete at an atomic level; and

a second insulating film that contains second impurities different from the first impurities, the second insulating film being disposed immediately on a top of the first insulating film.

32 . A semiconductor memory device that conducts a memory operation by trapping electric charges into a gate insulating film, the semiconductor memory device comprising:

a semiconductor substrate;

first and second impurities diffusion layers disposed in the semiconductor substrate;

a gate insulating film disposed on the semiconductor substrate; and

a first gate electrode disposed on the semiconductor substrate by way of the gate insulating film,

wherein the gate insulating film has:

a first insulating film that contains first impurities which tend to combine with oxygen in the insulating film and which are discrete at an atomic level;

a second insulating film that contains second impurities different from the first impurities, the second insulating film being disposed immediately on a top of the first insulating film; and further

a silicon oxide film disposed on a top and a bottom of a deposited film comprised of the first and second insulating films, the silicon oxide film not containing the first and second impurities.

33 . The semiconductor memory device as defined in claim 28 , wherein a density of charge trapping sites disposed by the first impurities is equal to and greater than 1×10 12 particles/cm 2 and less than 1×10 14 particles/cm 2 .

34 . The semiconductor memory device as defined in claim 28 , wherein the first impurities consist of metal.

35 . The semiconductor memory device as defined in claim 28 , wherein the first impurities consist of titan.

36 . The semiconductor memory device as defined in claim 34 , wherein the addition quantity of the first impurities as converted to film thickness of metal is less than the thickness of a single atomic layer.

37 . The semiconductor memory device as defined in claim 29 , wherein the second impurities consist of nitrogen.

38 . The semiconductor memory device as defined in claim 28 , wherein the first insulating film consists of, or the first and second insulating films consist of, silicon oxide film.

39 . The semiconductor memory device as defined in claim 28 , wherein a thin film consists of Al 2 O 3 , SiN or SiON is disposed on the first insulating film.

40 . The semiconductor memory device as defined in claim 31 , wherein a thin film consists of Al 2 O 3 , SiN or SiON is disposed on the first or second insulating film.

41 . The semiconductor memory device as defined in claim 28 , wherein at least a part of the gate insulating film is comprised of a dielectric constant insulating film.

42 . The semiconductor memory device as defined in claim 28 , wherein at least a part of the gate insulating film is comprised of a deposited layer structure that consists of silicon oxide film-silicon nitride film-silicon oxide film.

43 . The semiconductor memory device as defined in claim 29 , wherein a distance between the first insulating film and the semiconductor substrate is equal to and greater than 4 nanometers.

44 . The semiconductor memory device as defined in claim 28 , wherein a distance between the first insulating film and the gate electrode is equal to and greater than 4 nanometers.

45 . The semiconductor memory device as defined in claim 31 , wherein a distance between the first or second insulating film and the gate electrode is equal to and greater than 4 nanometers.

46 . The semiconductor memory device as defined in claim 29 , wherein an entirety of the first gate electrode is disposed on the gate insulating film.

47 . The semiconductor memory device as defined in claim 31 , wherein:

one part of the first gate electrode is disposed on the gate insulating film having the first insulating film; and the other part of the first gate electrode is disposed on a second gate insulating film not having the first or second impurities.

48 . The semiconductor memory device as defined in claim 47 , wherein:

the gate insulating film having the first insulating film is disposed closer to one of first and second impurities diffusion layers; and

the second gate insulating film is disposed closer to an other one of the first and second impurities diffusion layers.

49 . The semiconductor memory device as defined in claim 47 , wherein:

the second gate insulating film is disposed on the semiconductor substrate between the first and second impurities diffusion layers; and

the gate insulating film having the first insulating film is disposed on both sides thereof.

50 . The semiconductor memory device as defined in claim 47 , wherein:

the first and second gate electrodes are disposed on the semiconductor substrate between first and second impurities diffusion layers;

the second gate electrode is disposed on second gate insulating film that does not contain the first impurities or the first and second impurities; and

the first gate electrode is disposed on the first insulating film.

51 . The semiconductor memory device as defined in claim 50 , wherein the second gate electrode is disposed in such a manner that a part thereof runs on the first gate electrode.

52 . The semiconductor memory device as defined in claim 50 , wherein:

the second gate electrode is disposed on the semiconductor substrate between first and second impurities diffusion layer; and

the first gate electrodes are disposed on and across both sides of the second gate electrode.

53 . The semiconductor memory device as defined in claim 50 , wherein:

the first, second and third gate electrodes are disposed on the semiconductor substrate between the first and second impurities diffusion layers;

the second gate electrode is disposed on second gate insulating film that does not contain the first impurities or the first and second impurities; and

the first and third gate electrodes are disposed on the first insulating film.

54 . The semiconductor memory device as defined in claim 50 , wherein:

a first voltage equal to and greater than a specific voltage in absolute value is applied to between the first and second impurities diffusion layers disposed between the semiconductor substrate, and a second voltage equal to and greater than a specific voltage in absolute value is applied to the first gate electrode, whereby a hot carrier is generated in the vicinity of the first or second impurities diffusion layer; and

the hot carrier is locally injected to the silicon oxide film that contains impurities whereby write or erase operation is conducted.

55 . The semiconductor device wherein the semiconductor memory device as defined in claim 28 is disposed on a region of a substrate, and a circuit other than a non-volatile memory is disposed on a remaining region of the substrate.

56 . The semiconductor device wherein the semiconductor memory device as defined in claim 28 is disposed on a region of a substrate, and a logic circuit is disposed on a remaining region of the substrate.