High-speed wireless serial communication link for a stacked device configuration using near field coupling
View Patent ↗A memory module houses stacked memory devices and a memory controller each having a near-field interface coupled to loop antennas to communicate over-the-air data. A coil is formed on a memory device substrate or molded into a plastic mold to create near-field magnetic coupling with the stacked memory devices and the memory controller.
1. A memory module including a package, the package to house multiple memory devices, the memory module comprising:
a memory controller formed in the package and having a loop antenna to transmit over-the-air data; and
a first memory device and a second memory device each formed in the package and each having a near-field interface coupled to one or more loop antennas to receive the over-the-air data from the memory controller, the first memory device and the second memory device each being further configured to communicate with each other directly via radio-frequency wireless signals in the near-field through the respective one or more loop antennas.
2. The memory module of claim 1 , wherein the first memory device includes a transceiver coupled to the loop antenna to provide bi-directional communication with the second memory device.
3. The memory module of claim 1 , where a coil is formed on a substrate to which the first memory device is attached to create near-field magnetic coupling with the second memory device and the memory controller.
4. The memory module of claim 1 , wherein a coil is molded into a plastic housing, the first memory device to create near-field magnetic coupling with the second memory device and the memory controller.
5. The memory module of claim 1 , wherein data is to be transmitted wirelessly and a control signal, a reference clock, and a chip select signal are hardwired from the memory controller to the first and second memory devices.
6. The memory module of claim 1 , wherein a memory/antenna combination is stacked on top of another memory/antenna combination in a same package.
7. The memory module of claim 1 , wherein the first and second memory devices are mounted on a substrate and stacked, and are located next to an unstacked memory controller.
8. The memory module of claim 1 , further including a switch device in the stack of the first and second memory devices to select a chip-select pin for each memory device to control bus arbitration.
9. The memory module of claim 8 , wherein the switch device is to communicate with the memory controller using wired serial links.
10. A stacked memory device housed in a package, including:
a first memory device having a near-field interface coupled to a first loop antenna and a first radio subsystem; and
a second memory device having a near-field interface coupled to a second loop antenna and a second radio subsystem to transmit and receive wireless communications directly from the first memory device, the loop antenna of a corresponding one of the first memory device and the second memory device being configured to receive over-the-air data transmitted from a memory controller housed in the package.
11. The stacked memory device of claim 10 , wherein the wireless communications between the first and second memory devices housed within the stacked memory device use an enhanced Gigabit Ethernet port.
12. The stacked memory device of claim 10 , further including a memory controller located next to the first and second memory devices that are stacked.
13. The stacked memory device of claim 12 , wherein the first and second memory devices and the memory controller are configured to transmit data wirelessly and other signals are hardwired from the memory controller to the first and second memory devices.
14. The stacked memory device of claim 12 , further including a switch device in the stack of first and second memory devices to select a chip-select for each memory device in the stack.
15. A memory module including a package, the memory module comprising:
a memory controller formed in the package and having a loop antenna to transmit over-the-air data;
a plurality of memory devices in a first stack of memory devices, each of the plurality of memory devices having a near-field interface, a radio subsystem, and one or more loop antennas, each of the memory devices being configured to communicate with both the memory controller and directly with other ones of the plurality of memory devices through the one or more loop antennas via radio-frequency wireless communications; and
a switch device in the first stack of memory devices each formed in the package, the switch to individually select one of the plurality of memory devices in the first stack to receive the over-the-air data from the memory controller.
16. The memory module of claim 15 , further including a switch device in a second stack of memory devices to individually control selection of the memory devices in the second stack, where the first stack, the second stack, and the memory controller are located side-by-side.
17. The memory module of claim 15 , wherein the memory devices in the first stack and the memory devices in the second stack each have a near-field interface and a loop antenna to communicate via the radio-frequency wireless communications with the memory controller.
18. The memory module of claim 15 , wherein the memory devices in the first stack and the memory devices in the second stack are configured to communicate via the radio-frequency wireless communications with each other.
19. The memory module of claim 15 , wherein the memory devices in the first stack each have a coil formed on a substrate to create near-field magnetic coupling with other memory devices in the first stack and with the memory controller.
20. The memory module of claim 1 , wherein at least one of the first and second memory devices comprises a configuration routing table to keep track of routing information for other memory devices in the memory module.
21. The memory module of claim 20 , wherein the configuration routing table is to be updated dynamically during operation of a corresponding one of the first and second memory devices.