IP Library Granted Patent US 8,631,566
Granted Patent B2
US 8,631,566 · App. 12/546,454 · Granted Jan 21, 2014

Circuit board structure comprising an electrical component and a method for manufacturing a circuit board structure comprising an electrical component

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Quick Facts
Patent No.
US 8,631,566
App. No.
12/546,454
Granted
Jan 21, 2014
Kind
B2
Abstract

A method for manufacturing a circuit board structure comprising at least one electrical component. The method comprises the steps of fabricating a conductive pattern on the surface of an essentially plane-like layer on the back side of the plane-like layer, and forming an electrical contact between the at least one electrical component and the conductive pattern. The method further comprises the steps of attaching the at least one electrical component to the back side of the plane-like layer after the fabrication of the conductive pattern, molding encapsulation material on the back side of the plane-like layer so that the encapsulation material at least partly encloses the at least one electrical component attached to the back side of the plane-like layer, and forming holes through the conductive pattern at positions where terminals of the at least one electrical component is attached to the back side of the plane-like layer and become positioned when the at least one electrical component is attached to the circuit board structure.

Claims (10)

1. A method for manufacturing a circuit board structure comprising at least one electrical component, comprising the steps of fabricating a conductive pattern on the surface of an essentially plane-like layer on the back side of the plane-like layer, and forming an electrical contact between the at least one electrical component and the conductive pattern, wherein the method comprises the steps of:

attaching the at least one electrical component on the back side of the plane-like layer after the fabrication of the conductive pattern so that terminals below the at least one electrical component become positioned against the conductive pattern fabricated on the back side of the plane-like layer,

molding encapsulation material on the back side of the plane-like layer so that the encapsulation material at least partly encloses the at least one electrical component attached to the back side of the plane-like layer and that the front side of the plane-like layer remains free of the encapsulation material at least at positions where the at least one electrical component is attached to the plane-like layer on the back side of the plane-like layer, and

forming holes through the conductive pattern at positions where the terminals of the at least one electrical component is attached to the back side of the plane-like layer and become positioned when the at least one electrical component is attached to the circuit board structure in order to form a conduit from the terminal through the conductive pattern.

2. A method as claimed in claim 1 , wherein the holes are formed through the plane-like layer and the conductive pattern before the at least one electrical component is attached to the back side of the plane-like layer after the fabrication of the conductive pattern, in order to form a conduit from the front side of the plane-like layer to the back side of the plane-like layer.

3. A method as claimed in claim 1 , wherein the methods comprises the step of

partly covering the plane-like layer so that, as viewed from the back side of the plane-like layer, only those areas where an electrical component is attached and their surroundings can be exposed to the encapsulation material so that the encapsulation material cannot come into contact with the front side of the plane-like layer when the encapsulation material is molded on the back side of the plane-like layer to enclose the at least one electrical component within the encapsulation material.

4. A method as claimed in claim 1 , wherein the method comprises the step of

applying a binder agent to the back side of the plane-like layer so that the terminals below the electrical component essentially become located within the binder agent when the electrical component is attached to the circuit board structure.

5. A method as claimed in claim 1 , wherein the plane-like layer comprises an etch stop layer for protecting the conductive pattern.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNOR NAME PREVIOUSLY RECORDED AT REEL: 052853 FRAME: 0153. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 29, 2021
From: R2 SOLUTIONS LLC
To: STARBOARD VALUE INTERMEDIATE FUND LP, AS COLLATERAL AGENT
Reel/Frame 056832/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED ON REEL 053654 FRAME 0254. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST GRANTED PURSUANT TO THE PATENT SECURITY AGREEMENT PREVIOUSLY RECORDED. Recorded Dec 30, 2020
From: STARBOARD VALUE INTERMEDIATE FUND LP
To: R2 SOLUTIONS LLC
Reel/Frame 054981/0377 →
STATEMENT REGARDING SECURITY INTEREST INCORRECTLY RECORDED AGAINST PATENTS Recorded Oct 20, 2020
From: ACACIA RESEARCH GROUP LLC; R2 SOLUTIONS LLC
To: IMBERATEK, LLC
Reel/Frame 054134/0172 →
RELEASE OF SECURITY INTEREST IN PATENTS Recorded Jul 8, 2020
From: STARBOARD VALUE INTERMEDIATE FUND LP
To: ACACIA RESEARCH GROUP LLC; AMERICAN VEHICULAR SCIENCES LLC; BONUTTI SKELETAL INNOVATIONS LLC; CELLULAR COMMUNICATIONS EQUIPMENT LLC; INNOVATIVE DISPLAY TECHNOLOGIES LLC; LIFEPORT SCIENCES LLC; LIMESTONE MEMORY SYSTEMS LLC; MOBILE ENHANCEMENT SOLUTIONS LLC; MONARCH NETWORKING SOLUTIONS LLC; NEXUS DISPLAY TECHNOLOGIES LLC; PARTHENON UNIFIED MEMORY ARCHITECTURE LLC; R2 SOLUTIONS LLC; SAINT LAWRENCE COMMUNICATIONS LLC; STINGRAY IP SOLUTIONS LLC; SUPER INTERCONNECT TECHNOLOGIES LLC; TELECONFERENCE SYSTEMS LLC; UNIFICATION TECHNOLOGIES LLC
Reel/Frame 053654/0254 →
PATENT SECURITY AGREEMENT Recorded Jun 5, 2020
From: ACACIA RESEARCH GROUP LLC; AMERICAN VEHICULAR SCIENCES LLC; BONUTTI SKELETAL INNOVATIONS LLC; CELLULAR COMMUNICATIONS EQUIPMENT LLC; INNOVATIVE DISPLAY TECHNOLOGIES LLC; LIFEPORT SCIENCES LLC; LIMESTONE MEMORY SYSTEMS LLC; MERTON ACQUISITION HOLDCO LLC; MOBILE ENHANCEMENT SOLUTIONS LLC; MONARCH NETWORKING SOLUTIONS LLC; NEXUS DISPLAY TECHNOLOGIES LLC; PARTHENON UNIFIED MEMORY ARCHITECTURE LLC; R2 SOLUTIONS LLC; SAINT LAWRENCE COMMUNICATIONS LLC; STINGRAY IP SOLUTIONS LLC; SUPER INTERCONNECT TECHNOLOGIES LLC; TELECONFERENCE SYSTEMS LLC; UNIFICATION TECHNOLOGIES LLC
To: STARBOARD VALUE INTERMEDIATE FUND LP, AS COLLATERAL AGENT
Reel/Frame 052853/0153 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 5, 2020
From: GE EMBEDDED ELECTRONICS OY
To: IMBERATEK, LLC
Reel/Frame 051730/0868 →
CHANGE OF NAME Recorded Jan 23, 2020
From: IMBERA ELECTRONICS OY
To: GE EMBEDDED ELECTRONICS OY
Reel/Frame 051669/0086 →
CHANGE OF NAME Recorded Jan 15, 2014
From: IMBERA ELECTRONICS OY
To: GE EMBEDDED ELECTRONICS OY
Reel/Frame 032019/0225 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2009
From: PALM, PETTERI; WARIS, TUOMAS
To: IMBERA ELECTRONICS OY
Reel/Frame 023492/0121 →