IP Library Granted Patent US 9,443,974
Granted Patent B2
US 9,443,974 · App. 12/549,190 · Granted Sep 13, 2016

Super junction trench power MOSFET device fabrication

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Quick Facts
Patent No.
US 9,443,974
App. No.
12/549,190
Granted
Sep 13, 2016
Kind
B2
Abstract

Methods of fabricating a super junction trench power MOSFET (metal oxide semiconductor field effect transistor) device are described. A column of p-type dopant in the super junction is separated from a first column of n-type dopant by a first column of oxide and from a second column of n-type dopant by a second column of oxide. In an n-channel device, a gate element for the FET is advantageously situated over the column of p-type dopant; and in a p-channel device, a gate element for the FET is advantageously situated over the column of n-type dopant.

Claims (17)

1. A method of fabricating a super junction trench power metal oxide semiconductor field effect transistor (MOSFET) device having a channel of a first type dopant, said method comprising:

forming a column of second type dopant on a substrate of said first type dopant, wherein said substrate is adjacent to a drain electrode;

depositing a layer of oxide on said substrate and on opposite sides of said column of said second type dopant to form a first column of oxide on said substrate and a second column of oxide on said substrate;

forming a first column of said first type dopant on and in contact with said substrate and adjacent said first column of oxide and forming a second column of said first type dopant on and in contact with said substrate and adjacent said second column of oxide, said column of said second type dopant separated from said first and second columns of said first type dopant by said first and second columns of oxide;

forming a gate element for a field effect transistor between said first column of said first type dopant and said second column of said first type dopant and above said column of said second type dopant;

forming a body region of said second type dopant and forming a source region of said first type dopant adjacent to said gate element;

forming a trench that extends in said first column of said first type dopant, wherein said trench extends through said source region and into said body region;

implanting a region of said second type dopant between said trench and said first column of said first type dopant, said region in contact with both said trench and said first column of said first type dopant and said region separating said trench from said first column of said first type dopant; and

depositing source metal to fill said trench, wherein said region of said second type dopant is in contact with said source metal in said trench and separates said source metal in said trench from said first column of said first type dopant, and wherein said body region and said source region are exposed to and in contact with said source metal in said trench.

2. The method of claim 1 further comprising depositing an oxide layer above said column of said second type dopant prior to forming said gate element to separate said column of said second type dopant from said gate element.

3. The method of claim 1 wherein said first type dopant comprises n-type dopant and said second type dopant comprises p-type dopant.

4. The method of claim 1 further comprising forming an electrical connection that electrically shorts said column of said second type dopant to said layer of source metal.

5. The method of claim 4 wherein said column of first type dopant and said column of second type dopant each have a first dimension greater than a second dimension, said first dimension measured in a first direction and said second dimension measured in a second direction that is orthogonal to said first direction, wherein said source metal is electrically shorted to said column of second type dopant in a third direction that is orthogonal to said first direction and said second direction.

6. The method of claim 1 wherein said trench is aligned with the longitudinal axis of said first column of said first type dopant.

7. The method of claim 1 wherein said first type dopant comprises p-type dopant and said second type dopant comprises n-type dopant.

8. The method of claim 1 wherein said trench extends in said first column in the direction of the longitudinal axis of said trench, wherein said region is between said trench and said first column of said first type dopant in said direction of said longitudinal axis.

9. The method of claim 1 wherein said region is wider than said trench.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Jul 17, 2019
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: VISHAY DALE ELECTRONICS, INC.; DALE ELECTRONICS, INC.; VISHAY INTERTECHNOLOGY, INC.; SILICONIX INCORPORATED; VISHAY SPRAGUE, INC.; VISHAY TECHNO COMPONENTS, LLC; VISHAY EFI, INC.; VISHAY VITRAMON, INC.; SPRAGUE ELECTRIC COMPANY
Reel/Frame 049826/0312 →
SECURITY INTEREST Recorded Jun 12, 2019
From: VISHAY DALE ELECTRONICS, INC.; DALE ELECTRONICS, INC.; VISHAY DALE ELECTRONICS, LLC; VISHAY-DALE, INC.; VISHAY INTERTECHNOLOGY, INC.; SILICONIX INCORPORATED; VISHAY-SILICONIX, INC.; VISHAY-SILICONIX; VISHAY SPRAGUE, INC.; VISHAY EFI, INC.; SPRAGUE ELECTRIC COMPANY; VISHAY GENERAL SEMICONDUCTOR, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 049440/0876 →
SECURITY AGREEMENT Recorded Jan 21, 2011
From: VISHAY INTERTECHNOLOGY, INC.; VISHAY DALE ELECTRONICS, INC.; SILICONIX INCORPORATED; VISHAY SPRAGUE, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 025675/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2009
From: GAO, YANG; TERRILL, KYLE; PATTANAYAK, DEVA; CHEN, KUO-IN; CHAU, THE-TU; SHI, SHARON; CHEN, QUFEI
To: VISHAY-SILICONIX
Reel/Frame 023158/0808 →