Methods for forming semiconductor devices with low resistance back-side coupling
Electronic elements ( 40 ) with very low resistance back-side coupling are provided by forming one or more narrow trenches or pipes ( 411 ), preferably dielectric lined, in front sides ( 523 ) of substrates ( 52 ′), filling the trenches or pipes with a conductor ( 54 ) having a coefficient of expansion not too different from that of the substrate ( 52 ′) but of higher conductivity, forming an epitaxial SC layer ( 64 ) over the front side ( 523 ) of the substrate ( 52 ′) in Ohmic contact with the conductor ( 54 ) in the trenches or pipes ( 411 ), forming various semiconductor (SC) devices ( 42, 80 ) in the epi-layer ( 64 ), back grinding the substrate ( 52 ′) to expose bottoms ( 548 ) of the conductor filled trenches or pipes ( 41 ), and providing a back-side conductor ( 524 ) contacting the conductor ( 54 ) in the trenches or pipes ( 411 ). For silicon SCs, tungsten is a suitable conductor ( 54 ) for filling the trenches or pipes ( 411 ) to minimize substrate stress. Series ON-resistance of the elements ( 40 ) due to the substrate resistance is substantially reduced.
1. A method for forming an electronic element, comprising:
providing an initial substrate comprising a semiconductor and of an initial thickness between an initial first surface and an opposed initial second surface;
forming one or more pipes or trenches extending into the initial substrate from the initial first surface by a distance less than the initial thickness;
substantially filling the pipes or trenches with a conductor to form conductor filled pipes or trenches;
forming a semiconductor layer over the initial first surface and the conductor filled pipes or trenches wherein the semiconductor layer comprises a region adapted for device formation and having a new first surface;
forming one or more semiconductor devices in the device region;
thinning the initial substrate by removing material from the initial second surface thereby providing a thinned substrate with a new second surface with one or more lower faces of the conductor in the conductor filled pipes or trenches exposed thereon; and
providing a conductor supported by the new second surface making Ohmic contact to the one or more lower faces of the conductor in the conductor filled pipes or trenches.
2. The method of claim 1 , further comprising prior to the step of substantially filling the pipes or trenches with a conductor, substantially conformally coating the pipes or trenches with a dielectric comprising layer.
3. The method of claim 2 , wherein the dielectric comprising layer comprises a first electrically insulating layer and a second barrier layer.
4. The method of claim 3 , wherein the second barrier layer comprises nitrogen.
5. The method of claim 4 , wherein the second barrier layer further comprises titanium.
6. The method of claim 1 , wherein the initial substrate has a first thermal coefficient of expansion (TCE 52 ) and the conductor has a second thermal coefficient of expansion (TCE 54 ) and a ratio R=(TCE 54 )/(TCE 52 ) is less than or equal about 3.
7. The method of claim 6 , wherein R is less than or equal about 2.
8. The method of claim 7 , wherein R is less than or equal about 1.5.
9. The method of claim 1 , wherein the conductor comprises tungsten.
10. The method of claim 2 , further comprising prior to the step of substantially filling the pipes or trenches with a conductor, substantially coating the dielectric comprising layer with a further layer adapted to act as a seed layer for localized deposition of the conductor.
11. The method of claim 10 , further comprising prior to the step of substantially filling the pipes or trenches with a conductor, anisotropically etching the further layer to substantially remove portions thereof not on portions of the dielectric comprising layer on interior sidewalls of the pipes or trenches.
12. The method of claim 1 , further comprising prior to forming the semiconductor layer, providing a barrier region above the conductor in the conductor filled pipes or trenches adapted to prevent direct contact between the conductor and the semiconductor layer.
13. The method of claim 12 , wherein the barrier region is electrically conductive.
14. A method of forming an electronic device, comprising:
providing a substrate having a front surface and an initial back surface in which substrate conductor filled vias have been provided extending substantially from the front surface part-way through the substrate to a predetermined thickness from the initial back surface;
providing a semiconductor layer overlying the front surface and the conductor filled cavities;
forming one or more devices in the semiconductor layer;
removing the predetermined thickness of substrate from the initial back surface thereby exposing a final back surface on which one or more of the conductor filled vias is exposed; and
providing an electrical conductor in Ohmic contact with the one or more of the conductor filled vias exposed on the final back surface.
15. The method of claim 14 , further comprising, interposing an electrically conductive barrier region between the semiconductor layer and the conductor filled vias.
16. A method for forming an electronic element having a font-side and a final backside and having one or more electronic devices proximate the front-side from which current flows to the final backside of the electronic element, the method comprising:
providing a substrate having an upper surface and an initial lower surface;
forming one or more conductor filled pipes or trenches to be electrically coupled to the one or more electronic devices and extending between the upper surface and the final backside for substantially conducting the current flowing from the one or more electronic devices to the final backside of the electronic element;
forming an epitaxial layer on the upper surface and over the one or more conductor filled trenches extending from the upper surface to the front side of the electronic element, such epitaxial layer being adapted to substantially contain the one or more electronic devices; and
after forming the one or more conductor filled pipes or trenches, the epitaxial layer, and the one or more electronic devices, removing material from the initial lower surface to form a final lower surface forming the final backside, the final lower surface being displaced from the initial lower surface.
17. The electronic element of claim 16 , further comprising one or more isolation walls or separators formed from further conductor filled trenches extending at least from the upper surface to the final backside.
18. The electronic element of claim 17 , wherein at least some of the one or more isolation walls or separators lie laterally outside of the one or more electronic devices.
19. The electronic element of claim 17 , wherein at least some of the one or more isolation walls extend substantially between the final backside and the front-side of the electronic element.
20. The electronic element of claim 16 , wherein the conductor filled pipes or trenches have an insulating liner.