IP Library Granted Patent US 8,438,337
Granted Patent B1
US 8,438,337 · App. 12/571,230 · Granted May 7, 2013

System and method for conditionally sending a request for data to a home node

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Quick Facts
Patent No.
US 8,438,337
App. No.
12/571,230
Granted
May 7, 2013
Kind
B1
Abstract

A system and method are provided for sharing data between a network including one or more network nodes. The network includes a number of individual network nodes and a home network node communicating with one another. The individual network nodes and the home network node include a plurality of processors and memory caches. The memory caches consist of private caches corresponding to individual processors, as well as shared caches which are shared among the plurality of processors of an individual node and accessible by the processors of the other network nodes. Each network node is capable of executing a hierarchy of data requests that originate in the private caches of an individual local network node. If no cache hits occur within the local network node, a conditional request is sent to the home network node to request data through the shared caches of the other network nodes.

Claims (46)

1. In a processor, a method, comprising:

sending a first request for cache data to a first cache of a first network node;

sending a second request for the cache data to a second cache of the first network node, if the cache data does not exist in the first cache; and

conditionally sending a third request for the cache data to a home network node.

2. The method of claim 1 , wherein the step of conditionally sending comprises:

sending the third request for the cache data to the home network node if the cache data does not exist in the second cache.

3. The method of claim 1 , wherein the step of conditionally sending comprises:

sending the third request for the cache data to the home network node if the cache data does not exist in all local caches of the first network node.

4. The method of claim 1 , wherein the step of conditionally sending comprises:

sending the third request for the cache data to the home network node if a state of the cache data in a cache of the first network node does not meet a criterion.

5. The method of claim 1 , wherein the steps of sending the second request and conditionally sending the third request comprise:

sending the second request and the third request utilizing a coherency controller.

6. The method of claim 1 , further comprising:

receiving a cache miss from the first cache in response to the first request for the cache data if the cache data does not exist in the first cache.

7. The method of claim 1 , wherein the first network node is from among a plurality of network nodes, and wherein the step of conditionally sending comprises:

sending the third request for the cache data to the home network node based upon:

the first request or the second request including a write request;

the cache data existing in the first cache of the first network node; and

a state of the cache data in the first cache indicating that additional copies of the cache data exist in additional network nodes of the plurality of network nodes.

8. The method of claim 1 , wherein the step of conditionally sending further comprises:

not sending the third request for the cache data to the home network node if the first request or the second request includes a read request and the cache data exists in a cache of the first network node.

9. A network node, comprising:

a first cache configured to store cache data;

a second cache configured to store cache data; and

a processor configured to:

send a first request for the cache data to the first cache;

send a second request for the cache data to the second cache, if the cache data does not exist in the first cache; and

conditionally send a third request for the cache data to a home network node.

10. The network node of claim 9 , wherein the processor is from among a plurality of processors, each processor of the plurality of processors having a private cache.

11. The network node of claim 9 , wherein the network node is from among a plurality of network nodes, and wherein the network node further comprises:

a shared cache configured to be shared among the plurality of network nodes.

12. The network node of claim 9 , wherein the first cache is a private cache of the processor.

13. The network node of claim 12 , wherein the network node further comprises:

a second processor, wherein the second cache is a private cache of the second processor.

14. The network node of claim 9 , wherein the first cache is a level 2 (L2) cache.

15. The network node of claim 9 , wherein the processor is from among a plurality of processors, and wherein the second cache is configured to be shared among the plurality of processors.

16. The network node of claim 9 , wherein the second cache is a level 3 (L3) cache.

17. The network node of claim 9 , further comprising:

a memory, wherein the cache data includes a memory address corresponding to the memory.

18. The network node of claim 17 , wherein the memory address corresponds to a memory address allocated to the home network node.

19. The network node of claim 9 , wherein the network node is incorporated as part of a System-on-Chip (SoC) architecture.

20. The network node of claim 9 , wherein the network node is from among a plurality of network nodes.

21. A network node, comprising:

a plurality of processors each including a corresponding private cache, each of the plurality of processors configured to request cache data from the corresponding private cache and to determine a cache hit or a cache miss;

a shared cache configured to be shared among the plurality of processors; and

a coherency controller configured to send a snoop request to the shared cache and to each of the corresponding private caches based on the determination of the cache hit or the cache miss.

Assignments (10)
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER TO 09/05/2018 PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0133. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0456 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0133 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
CHANGE OF NAME Recorded Apr 16, 2015
From: NETLOGIC MICROSYSTEMS, INC.
To: NETLOGIC I LLC
Reel/Frame 035443/0824 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2015
From: NETLOGIC I LLC
To: BROADCOM CORPORATION
Reel/Frame 035443/0763 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2012
From: RMI CORPORATION
To: NETLOGIC MICROSYSTEMS, INC.
Reel/Frame 028163/0168 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 11, 2010
From: RMI CORPORATION
To: NETLOGIC MICROSYSTEMS, INC.
Reel/Frame 023926/0338 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2009
From: GARG, GAURAV; HASS, DAVID T.
To: RMI CORPORATION
Reel/Frame 023310/0545 →