Partitioning process to improve memory cell retention
View Patent ↗Subject matter disclosed herein relates to improving memory cell retention for non-volatile flash memory.
1. A method comprising:
partitioning a non-volatile memory device into a first memory portion and a second memory portion, wherein said first memory portion includes a plurality of memory cells, wherein said plurality of memory cells include tunnel oxide layers;
operating said first memory portion in a standby mode while operating said second memory portion in a read/write mode; and
applying a healing polarization to said first memory portion in said standby mode to redistribute electrical oxide charges in said tunnel oxide layers of said plurality of memory cells of said first memory portion of said non-volatile memory device.
2. The method of claim 1 , wherein said healing polarization is applied to said first memory portion for substantially one second or more.
3. The method of claim 1 , wherein said first memory portion comprises a block of memory cells of said non-volatile memory device.
4. The method of claim 1 , further comprising returning said first memory portion to operate in said read/write mode.
5. The method of claim 4 , further comprising:
subsequent to returning said first memory portion to operate in said read/write mode, applying said healing polarization to said second memory portion; and
returning said second memory portion to operate in said read/write mode.
6. The method of claim 1 , further comprising:
applying said healing polarization process to said first memory portion in response to detecting one or more bit errors from said first memory portion.
7. The method of claim 1 , wherein said applying said healing polarization comprises applying a substantially constant electric field to a control gate of said memory cells of said first memory portion during said standby mode.
8. The method of claim 1 , wherein said healing polarization comprises a pulsed polarization to generate a pulsed electric field between a floating gate and a substrate of said memory cells of said first memory portion during said standby mode.
9. A non-volatile memory device comprising:
a memory cell array including a first memory portion and a second memory portion, wherein said first memory portion includes a plurality of memory cells, wherein said plurality of memory cells include tunnel oxide layers; and
a controller adapted to apply a healing polarization to said first memory portion while said first memory portion operates in a standby mode and while said second memory portion operates in a read/write mode, wherein said healing polarization comprises redistributing electrical oxide charges in said tunnel oxide layers of said plurality of memory cells of said first memory portion of said non-volatile memory device.
10. The non-volatile memory device of claim 9 , wherein said controller is further adapted to apply said healing polarization to said first memory portion for substantially one second or more.
11. The non-volatile memory device of claim 9 , wherein said first memory portion comprises a block of memory cells of said non-volatile memory device.
12. The non-volatile memory device of claim 9 , wherein said healing polarization comprises a substantially constant electric field applied to a control gate of said memory cells of said first memory portion during said standby mode.
13. The non-volatile memory device of claim 9 , wherein said healing polarization comprises a pulsed polarization to generate a pulsed electric field between a floating gate and a substrate of said memory cells of said first memory portion during said standby mode.
14. A system comprising:
a processor to execute one or more applications stored in a memory cell array of a non-volatile memory device, wherein said memory cell array includes a first memory portion and a second memory portion, wherein said first memory portion includes a plurality of memory cells, wherein said plurality of memory cells include tunnel oxide layers; and
a controller to apply a healing polarization to said first memory portion of said memory cell array while said first memory portion operates in a standby mode and while said second memory portion of said memory cell array operates in a read/write mode, wherein said healing polarization comprises redistributing electrical oxide charges in said tunnel oxide layers of said plurality of memory cells of said first memory portion of said non-volatile memory device.
15. The system of claim 14 , wherein said controller is further adapted to apply said healing polarization to said first memory portion for substantially one second or more.
16. The system of claim 14 , wherein said first memory portion comprises a block of memory cells of said non-volatile memory device.
17. The system of claim 14 , wherein said healing polarization comprises a substantially constant electric field applied to a control gate of said memory cells of said first memory portion during said standby mode.
18. The system of claim 14 , wherein said healing polarization comprises a pulsed polarization to generate a pulsed electric field between a floating gate and a substrate of said memory cells of said first memory portion during said standby mode.