IP Library Granted Patent US 8,133,779
Granted Patent B2
US 8,133,779 · App. 12/577,364 · Granted Mar 13, 2012

Method of fabricating a semiconductor device

Assignee: Elpida Memory, Inc.
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Quick Facts
Patent No.
US 8,133,779
App. No.
12/577,364
Granted
Mar 13, 2012
Kind
B2
Abstract

A conductive film is formed to extend from a bottom and a sidewall of a recess formed in an interlayer insulating film onto a top surface of the interlayer insulating film. Dry etching of the conductive film is performed such that a portion of the conductive film remains on the bottom and sidewall of the recess. The dry etching is also performed such that a deposition film is formed on a top portion of the recess.

Claims (36)

1. A method of fabricating a semiconductor device, comprising:

forming an interlayer insulating film;

forming a recess in the interlayer insulating film;

forming a conductive film extending from a bottom and a sidewall of the recess onto a top surface of the interlayer insulating film such that a shape of an inner surface of the conductive film conforms with that of the recess; and

selectively removing a portion of the conductive film formed on the top surface of the interlayer insulating film by dry etching such that a portion of the conductive film remains on the bottom and sidewall of the recess,

wherein the dry etching is performed with forming a deposition film directly onto the inner surface of the conductive film including the bottom of the recess and with leaving a space surrounded by the deposition film in the recess such that a diameter of the space in an upper portion of the recess is smaller than a diameter of the space in a lower portion of the recess.

2. The method of fabricating a semiconductor device according to claim 1 , wherein the recess has an opening width of not more than 300 nm after the formation of the conductive film.

3. The method of fabricating a semiconductor device according to claim 2 , wherein the recess has a depth/opening width aspect ratio of not less than 5 after the formation of the conductive film.

4. The method of fabricating a semiconductor device according to claim 1 , wherein the dry etching is carried out by using an etching gas comprising at least a boron compound, while the deposition film comprises at least a compound of a component of the conductive film with boron.

5. The method of fabricating a semiconductor device according to claim 4 , wherein the dry etching is carried out by using an etching gas including BC13.

6. The method of fabricating a semiconductor device according to claim 5 , wherein the conductive film comprises TiN.

7. The method of fabricating a semiconductor device according to claim 6 , wherein the deposition film comprises boron and titanium.

8. The method of fabricating a semiconductor device according to claim 1 , wherein the dry etching includes:

removing the portion of the conductive film formed on the top surface of the interlayer insulating film; and

after the removing the portion of the conductive film, etching the top surface of the interlayer insulating film.

9. The method of fabricating a semiconductor device according to claim 8 ,

wherein the interlayer insulating film comprises at least a silicon oxide film or a silicon nitride film; and

wherein the etching the top surface of the interlayer insulating film is bias-applied etching.

10. The method of fabricating a semiconductor device according to claim 1 , further comprising removing the deposition film after the dry etching has been performed.

11. The method of fabricating a semiconductor device according to claim 1 , wherein the recess has a form of a hole.

12. The method of fabricating a semiconductor device according to claim 11 , wherein the portion of the conductive film which remains in the recess forms a lower electrode of a capacitor.

13. The method of fabricating a semiconductor device according to claim 1 , wherein the recess has a form of a trench.

14. The method of fabricating a semiconductor device according to claim 13 , wherein the portion of the conductive film which remains in the recess forms a guard-ring.

15. The method of fabricating a semiconductor device according to claim 1 , further comprising:

forming a capacitor contact plug electrically connected to the bottom of the conductive film;

removing the deposition film to expose the conductive film to be used for a lower capacitor electrode;

forming a capacitor insulating film on a surface of the lower capacitor electrode; and

forming an upper capacitor electrode on a surface of the capacitor insulating film.

16. The method of fabricating a semiconductor device according to claim 15 , further comprising after removing the deposition film, removing the interlayer insulating film.

17. The method of fabricating a semiconductor device according to claim 16 , wherein removing the interlayer insulating film is performed by wet etching.

18. A method, comprising:

forming an insulating layer;

selectively removing the insulating layer to form a hole in the insulating layer;

forming a conductive film extending from a bottom and a sidewall of the hole onto a top surface of the insulating layer; and

performing a dry etching to remove a portion of the conductive film formed on the top surface of the insulating layer with forming a deposition film onto an inner surface of the hole, the conductive film formed on the bottom of the hole being exposed to the dry etching, a thickness of the deposition film on an upper portion of the hole being larger than a thickness of the deposition film on a lower portion of the hole.

19. The method according to claim 18 , further comprising removing the deposition film after performing the dry etching.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 9, 2014
From: ELPIDA MEMORY, INC.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 032645/0422 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 21, 2009
From: OHTSUKA, KEISUKE
To: ELPIDA MEMORY, INC.
Reel/Frame 023403/0641 →
Priority Claims (1)
JP 2008-265238 · Oct 14, 2008 · national
Continuity (1)
Related Publication 20100093149A1 · Apr 15, 2010