IP Library › Patent Application 12585826
Patent Application
App. No. 12/585,826

Nonvolatile semiconductor memory device and method of manufacturing nonvolatile semiconductor memory device

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Quick Facts
Patent No.
US None
App. No.
12/585,826
Abstract

A nonvolatile semiconductor memory device (and method of forming same) includes a word gate provided above a channel region of a semiconductor substrate via an insulating layer, a control gate provided at a side of the word gate, and a charge storage layer provided by an ONO film between the channel region and the control gate, and between the word gate and the control gate. The control gate includes a silicide layer including silicide containing nickel, and a non-silicide layer provided between the silicide layer and the charge storage layer.

Claims (33)

1 . A nonvolatile semiconductor memory device, comprising:

a word gate provided above a channel region of a semiconductor substrate via an insulating layer;

a control gate provided at a side of the word gate; and

a charge storage layer provided by an ONO film between the channel region and the control gate, and between the word gate and the control gate,

wherein the control gate includes:

a silicide layer including silicide containing nickel; and

a non-silicide layer provided between the silicide layer and the charge storage layer.

2 . The nonvolatile semiconductor memory device according to claim 1 ,

wherein the non-silicide layer includes:

a silicide reaction inhibition layer provided between the silicide layer and the charge storage layer; and

a polysilicon layer provided between the silicide reaction inhibition layer and the charge storage layer.

3 . The nonvolatile semiconductor memory device according to claim 2 ,

wherein the silicide reaction inhibition layer is provided by at least one of silicon and germanium containing at least one of oxygen and carbon.

4 . The nonvolatile semiconductor memory device according to claim 1 ,

wherein the word gate includes a silicide layer including nickel at an upper part thereof.

5 . The nonvolatile semiconductor memory device according to claim 1 ,

wherein a height of the control gate is larger than a width of the control gate.

6 . The nonvolatile semiconductor memory device according to claim 5 ,

wherein the width of the control gate is equal to or less than 60 nm.

7 . The nonvolatile semiconductor memory device according to claim 1 ,

wherein the ONO film includes a laminated film of a silicon oxide film, a silicon nitride film, and a silicon oxide film.

8 . A method of manufacturing a nonvolatile semiconductor memory device, comprising:

forming an ONO film so as to cover a word gate formed above a semiconductor substrate via an insulating layer;

forming a polysilicon film so as to cover the ONO film;

forming a control gate at a side of the word gate via the ONO film by etching the polysilicon film;

etching the ONO film over the word gate and outside the control gate;

siliciding an upper part of the word gate, a part of the control gate, and a part outside the control gate by forming a metal film including nickel over an entire surface and applying heat treatment thereto; and

removing the metal film,

wherein the forming of the polysilicon film includes:

forming the polysilicon film while temporarily mixing an additive gas including at least one of oxygen and carbon into a film-forming gas during forming the polysilicon film.

9 . The method of manufacturing a nonvolatile semiconductor memory device according to claim 8 ,

wherein the etching of the ONO film includes:

covering a section of the ONO film exposed by the etching with a second insulating layer.

Assignments (2)
CHANGE OF NAME Recorded Oct 26, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025193/0147 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 25, 2009
From: MATSUDA, TOMOKO
To: NEC ELECTRONICS CORPORATION
Reel/Frame 023343/0310 →