IP Library Patent Application 12607726
Patent Application
App. No. 12/607,726

Epitaxy-Level Packaging (ELP) System

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Quick Facts
Patent No.
US None
App. No.
12/607,726
Abstract

An epitaxy-level packaging grows an epitaxial film and transfers it to an assembly substrate. The film growth and transfer are made using an epitaxy lateral overgrowth technique. The formed epitaxial film on an assembly substrate can be further processed to form devices such as solar cell, light emitting diode, and other devices and assembled into higher integration of desired applications.

Claims (33)

1 . An assembly substrate for semiconductor structures comprising:

a solid substrate including a number of openings defining a multidimensional pattern to be imparted to a thin film epitaxial layer;

said solid substrate being adapted to receive a liquid phase epitaxial material and having thermal characteristics sufficient to support growth of epitaxial material within said openings without causing damage to said rigid substrate.

2 . (canceled)

3 . The assembly substrate of claim 1 , wherein said rigid substrate is thermally matched to said thin film epitaxial layer.

4 . (canceled)

5 . The assembly substrate of claim 1 , wherein said openings in said solid substrate induce growth of said thin film epitaxial layer at an interface to an underlying crystalline substrate at bottom of said openings.

6 . (canceled)

7 . The assembly substrate of claim 1 , wherein said solid substrate is sufficiently rigid and adapted to be subjected to additional semiconductor processing steps in lieu of a semiconductor based wafer for forming other active devices on said solid substrate.

8 . (canceled)

9 . An epitaxial structure comprising:

an epitaxial assembly substrate comprised substantially of non-semiconductor material including a plurality of openings;

a thin film epitaxial layer situated within said plurality of openings and defining a multidimensional structure integrated within said solid substrate.

10 . The epitaxial structure of claim 9 , wherein said thin film epitaxial layer extends with a substantially uniform first thickness across a top surface of said epitaxial assembly substrate.

11 . The epitaxial structure of claim 9 , wherein said epitaxial assembly substrate and thin film epitaxial layer define an assembly substrate sufficiently rigid and adapted to be subjected to additional semiconductor processing steps in lieu of a semiconductor based wafer for forming other active devices on said epitaxial assembly substrate and/or said thin film epitaxial layer.

12 . The epitaxial structure of claim 9 , wherein said thin film epitaxial layer includes a graded composition throughout a thickness direction of said epitaxial assembly substrate.

13 . The epitaxial structure of claim 9 wherein said epitaxial layer is formed from a liquid phase epitaxial material and is adapted with thermal characteristics matching said epitaxial assembly substrate.

14 . The epitaxial structure of claim 9 further including a crystalline substrate attached to a bottom surface of said epitaxial assembly substrate.

15 . The epitaxial structure of claim 14 wherein said crystalline substrate is detachable from said epitaxial assembly substrate.

16 . The epitaxial structure of claim 9 further including one or more second separate thin film epitaxial layers situated on said thin film epitaxial layer.

17 . The epitaxial structure of claim 16 further including one or more second separate epitaxial assembly substrates situated on said thin film epitaxial layer and said epitaxial assembly substrate.

18 . The epitaxial structure of claim 16 wherein said one or more second separate thin film epitaxial layers and said thin film epitaxial layer include different dopant species.

19 . The epitaxial structure of claim 14 wherein said multidimensional structure includes lines and vias.

20 . The epitaxial structure of claim 9 , wherein said thin film epitaxial layer forms part of a p-n junction.

21 . The epitaxial structure of claim 9 , wherein said thin film epitaxial layer forms part of an integrated circuit device.

22 . The epitaxial structure of claim 14 further including a sacrificial layer attached between said bottom surface of said epitaxial assembly substrate and said crystalline substrate.

23 . The epitaxial structure of claim 14 further including a spacer situated adjacent said epitaxial assembly substrate and above said crystalline substrate.

24 . An epitaxial semiconductor structure comprising:

a solid substrate comprised substantially of non-semiconductor material including a plurality of openings forming a template for one or more epitaxial layers;

a first thin film epitaxial layer situated within said plurality of openings and defining a multidimensional structure integrated within said solid substrate;

a first semiconductor layer situated on said solid substrate and/or said first thin film epitaxial layer and defining one or more active devices;

a second thin film epitaxial layer situated on and defining a p-n junction with said first thin film epitaxial layer.

25 . (canceled)

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 3, 2016
From: ATHENAEUM LLC
To: PAN, ERIC TING-SHAN
Reel/Frame 039921/0482 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 8, 2015
From: PAN, ERIC TING-SHAN
To: ATHENAEUM LLC
Reel/Frame 036761/0466 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 6, 2009
From: PAN, ERIC TING-SHAN
To: ATHENAEUM LLC
Reel/Frame 023485/0094 →