IP Library Granted Patent US 8,129,709
Granted Patent B2
US 8,129,709 · App. 12/618,302 · Granted Mar 6, 2012

Nonvolatile memory device

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Quick Facts
Patent No.
US 8,129,709
App. No.
12/618,302
Granted
Mar 6, 2012
Kind
B2
Abstract

A nonvolatile memory device ( 21 ) is provided with a semiconductor substrate, a plurality of active regions ( 3 ) formed on the semiconductor substrate and extending in a band, a plurality of select active elements ( 23 ) formed in the active regions ( 3 ) and having a first impurity diffusion region and a second impurity diffusion region, a plurality of first electrodes ( 13 ) electrically connected to the first impurity diffusion region, a variable resistance layer ( 12 ) electrically connected to the first electrodes ( 13 ), and a plurality of second electrodes electrically connected to the variable resistance layer ( 12 ). Among the plurality of first electrodes ( 13 ) and the plurality of second electrodes, an array direction of at least one pair of the first electrodes ( 13 ) and the second electrodes that are electrically connected to the same variable resistance layer ( 12 ), and a direction of extension of the activation regions ( 3 ) are not parallel.

Claims (31)

1. A semiconductor device comprising:

an active region comprising a first diffusion region, a second diffusion region, a third diffusion portion, a first channel region between the first and second diffusion regions and a second channel region between the second and third diffusion regions, the first, second and third diffusion regions and the first and second channel regions being arranged in line in a first direction;

a first word line elongated in a second direction that is oblique to the first direction to cross the first channel with an intervention of a first gate insulating film therebetween;

a second word line elongated in the second direction to cross the second channel region with an intervention of a second gate insulating film therebetween;

a first insulating layer formed to cover the active region and the first and second word lines;

a reference line formed over the first insulating layer and elongated in the second direction to cross the second diffusion region with an intervention of a part of the first insulating layer;

a first contact plug formed in the part of the first insulating layer to connect the second diffusion region electrically to the reference line;

a second insulating layer formed to cover the first insulating layer and the reference potential line;

second and third contact plugs selectively formed in the first and second insulating layers to be in electrical contact respectively with the first and third diffusion regions;

a third insulating layer formed over the second insulating layer and the second and third contact plugs;

a bit line formed over the third insulating layer and elongated in a third direction that is substantially perpendicular to the second direction to cross the first and second word lines and the reference line;

a first information storage element formed between the second and third insulating layers, the first information storage element being in electrical contact with the second contact plug and being elongated toward the bit line in a fourth direction that is different from the first direction;

a fourth contact plug selectively formed in the third insulating layer to contact the first information storage element electrically to a first portion of the bit line;

a second information storage element formed between the second and third insulating layers separately from the first information storage element, the second information storage element being in electrical contact with the third contact plug and being elongated toward the bit line; and

a fifth contact plug selectively formed in the third insulating layer to contact the second information storage element electrically to a second portion of the bit line, the second portion of the bit line being apart from the first portion of the bit line.

2. The device as claimed in claim 1 , wherein the fourth direction is the same as the second direction.

3. The device as claimed in claim 1 , wherein the second information storage element is elongated toward the bit line in a fifth direction that is different from the first direction.

4. The device as claimed in claim 3 , wherein each of the fourth and fifth directions is the same as the second direction.

5. The device as claimed in claim 4 , wherein the first, fourth and fifth contact plugs arc arranged in line in the third direction, and the first contact plug is between the fourth and fifth contact plugs.

6. The device as claimed in claim 4 , each of the first and second information storage elements includes a first end portion that is in contact with an associated one of the second and third contact plugs, a second end portion that is in contact with an associated one of the fourth and fifth contact plugs, and a third portion that is between the first and second end portions and is smaller in thickness than each of the first and second end portions.

7. The device as claimed in claim 6 , further comprising a third information storage element formed between the second and third insulating layers separately from each of the first and second information storage elements, the third information storage element being in electrical contact with the fourth contact plug and being elongated in the second direction.

8. The device as claimed in claim 7 , further comprising a fourth information storage element formed between the second and third insulating layers separately from each of the first, second and third information storage elements, the fourth information storage element being in electrical contact with the fifth contact plug and being elongated in the second direction.

9. The device as claimed in claim 8 , each of the third and fourth information storage elements includes an end portion that is in contact with an associated one of the fourth and fifth contact plugs and a body portion that is elongated from the end portion and smaller in thickness than the end portion.

10. The device as claimed in claim 1 , wherein the fourth direction is oblique to each of the second and third direction.

11. The device as claimed in claim 1 , wherein the second information storage element is elongated toward the bit line in the first direction.

12. The device as claimed in claim 1 , wherein the fourth direction is oblique to each of the second and third direction, and the second information storage element is elongated toward the bit line in the first direction.

13. The device as claimed in claim 12 , wherein the fifth contact plug overlaps with the first contact plug, and fourth and fifth contact plugs are arranged in line in the third direction.

14. The device as claimed in claim 12 , each of the first and second information storage elements includes a first end portion that is in contact with an associated one of the second and third contact plugs, a second end portion that is in contact with an associated one of the fourth and fifth contact plugs, and a third portion that is between the first and second end portions and is smaller in thickness than each of the first and second end portions.

15. The device as claimed in claim 14 , further comprising a third information storage element formed between the second and third insulating layers separately from each of the first and second information storage elements, the third information storage element being in electrical contact with the fourth contact plug and being elongated in the first direction.

16. The device as claimed in claim 15 , further comprising a fourth information storage element formed between the second and third insulating layers separately from each of the first, second and third information storage elements, the fourth information storage element being in electrical contact with the fifth contact plug and being elongated in the fourth direction.

17. The device as claimed in claim 16 , each of the third and fourth information storage elements includes an end portion that is in contact with an associated one of the fourth and fifth contact plugs and a body portion that is elongated from the end portion and smaller in thickness than the end portion.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 9, 2014
From: ELPIDA MEMORY, INC.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 032645/0422 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2009
From: SEKO, AKIYOSHI; FUJI, YUKIO; SATO, NATSUKI; ASANO, ISAMU
To: ELPIDA MEMORY, INC.
Reel/Frame 023522/0913 →