Error correction code for unidirectional memory
View Patent ↗A memory array and a method of writing to a unidirectional non-volatile storage cell are disclosed whereby a user data word is transformed to an internal data word and written to one or more unidirectional data storage cells according to a cell coding scheme. A check word may be generated that corresponds to the internal data word. In some embodiments, the check word may be generated by inverting one or more bits of an intermediate check word. Other embodiments may be described and claimed.
1. A method of storing data, the method comprising:
receiving a first user data word to be stored;
transforming the first user data word to a first internal data word according to a transformation function, wherein the transformation function transforms {11, 10, 01, 00} of the first user data word to {11, 10, 00, 01} of the first internal data word and transforms {11, 10, 01, 00} of the second user data word to {11, 10, 00, 01} of the second internal data word, the first user data word being the same size as the first internal data word;
generating a first check word based at least in part on the first internal data word according to an error correction code (ECC) scheme;
writing the first internal data word and the first check word to a plurality of unidirectional data storage cells according to an internal cell coding scheme;
receiving a second user data word to be stored;
transforming the second user data word to a second internal data word according to the transformation function;
generating a second check word based at least in part on the second internal data word according to the ECC scheme; and
without erasing the plurality of unidirectional data storage cells, writing the second internal data word and the second check word to the plurality of unidirectional data storage cells according to the internal cell coding scheme.
2. The method of claim 1 , wherein said generating the first check word comprises:
generating an intermediate check word based at least in part on an ECC matrix and the first internal data word; and
inverting one or more bits of the intermediate check word.
3. The method of claim 1 , wherein the transformation function, the internal cell coding scheme, and the ECC scheme are such that a state of all of at least one unidirectional data storage cell matches a state of all of the plurality of unidirectional data storage cells when all of the plurality of unidirectional data storage cells are either in an initial state or a final state.
4. The method of claim 1 , wherein the internal cell coding scheme maps L0=11, L1=10, L2=00, and L3=01.
5. An apparatus comprising:
a processor, configured to execute program instructions; and
a program embodied in a non-transitory processor readable medium having associated program instructions that, when executed, cause the processor to:
receive a first user data word to be stored;
transform the first user data word to a first internal data word according to a transformation function, the first user data word being the same size as the first internal data word, wherein the transformation function transforms {11, 10, 01, 00} of the first user data word to {11, 10, 00, 01} of the first internal data word and transforms {11, 10, 01, 00} of the second user data word to {11, 10, 00, 01} of the second internal data word;
generate a first check word based at least in part on the first internal data word according to an error correction code (ECC) scheme;
write the first internal data word and the first check word to a plurality of unidirectional data storage cells according to an internal cell coding scheme;
receive a second user data word to be stored;
transform the second user data word to a second internal data word according to the transformation function;
generate a second check word based at least in part on the second internal data word according to the ECC scheme; and
without erasing the plurality of unidirectional data storage cells, write the second internal data word and the second check word to the plurality of unidirectional data storage cells according to the internal cell coding scheme.
6. The apparatus of claim 5 , wherein the associated program instructions, when executed, cause the processor to:
generate an intermediate check word based at least in part on an ECC matrix and the first internal data word; and
invert one or more bits of the intermediate check word to generate the check word.
7. The apparatus of claim 5 , wherein the transformation function, the internal cell coding scheme, and the ECC scheme are such that a state of all of at least one unidirectional data storage cell matches a state of all of the plurality of unidirectional data storage cells when all of the plurality of unidirectional data storage cells are either in an initial state or a final state.
8. The apparatus of claim 5 , wherein the internal cell coding scheme maps L0=11, L1=10, L2=00, and L3=01.