IP Library Granted Patent US 8,566,940
Granted Patent B1
US 8,566,940 · App. 12/625,716 · Granted Oct 22, 2013

Authenticated operations and event counters

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Quick Facts
Patent No.
US 8,566,940
App. No.
12/625,716
Granted
Oct 22, 2013
Kind
B1
Abstract

Apparatus and methods protect a memory device from a security attack. A security attack may lead to an unusually high number of security events, such as power cycling of a device hosting the computing system and/or memory device. Power cycling events of the memory device can be counted. A count value can be maintained of power cycling events occurring within a particular period of time. The count value can be compared to a threshold number. Normal operation is permitted if the count value does not exceed the threshold number. A security action is invoked when the count value exceeds the threshold number.

Claims (46)

1. A method of protecting a memory device, the method comprising:

counting within a memory device, power cycling events of the memory device;

maintaining a count value of the power cycling events occurring within a particular period of time;

comparing the count value to a threshold number;

increasing the threshold number in response to the threshold number not being exceeded within the particular period of time;

invoking a security action including at least one of an audible alarm, a visible alarm, or powering down when the count value exceeds the threshold number; and

providing the count value of the power cycling events to a processor external to the memory device in response to an authenticated read request.

2. The method of claim 1 , wherein the threshold number is 100 power cycles and the particular period of time is one month.

3. The method of claim 1 , wherein the threshold number is initially set to 100 power cycles and the particular period of time is one month, further comprising increasing the threshold number from 100 power cycles to 200 power cycles in response to the threshold number not being exceeded within the particular period of time.

4. The method of claim 1 , wherein the security action further comprises sending a message to a user to indicate a potential presence of a security attack.

5. The method of claim 1 , wherein the security action further comprises forbidding reading of contents stored in the memory device for a particular span of time.

6. A memory device comprising:

a memory cell array; and

a controller configured to:

count within said memory cell array, power cycling events of the memory cell array;

store a count value of the power cycling events occurring within a particular period of time;

compare the count value to a threshold number;

increase the threshold number in response to the threshold number not being exceeded within the particular period of time;

invoke a security action when the count value exceeds the threshold number; and

provide the count value of the power cycling events to a processor external to the memory device in response to an authenticated read request.

7. The memory device of claim 6 , wherein the threshold number is 100 power cycles and the particular period of time is one month.

8. The memory device of claim 6 , wherein the controller is further configured to increase the threshold number in response to the threshold number not being exceeded within the particular period of time.

9. The memory device of claim 6 , wherein the threshold number is initially set to 100 power cycles and the particular period of time is one month, wherein the controller is further configured to increase the threshold number from 100 power cycles to 200 power cycles in response to the threshold number not being exceeded within the particular period of time.

10. The memory device of claim 6 , wherein the security action comprises an alarm that is at least one of audible or visible to a user of a device incorporating the memory device.

11. The memory device of claim 6 , wherein for the security action, the controller is further configured to power down the memory device.

12. The memory device of claim 6 , wherein for the security action, the controller is further configured to forbid reading of contents stored in the memory device for a particular span of time.

13. The memory device of claim 6 , wherein for the security action, the controller is further configured to send a message to a user to indicate a potential presence of a security attack.

14. A system comprising:

a memory device comprising:

a memory controller,

a memory cell array; and

a controller configured to:

count within said memory cell array, power cycling events of the memory device;

store a count value of the power cycling events occurring within a particular period of time;

compare the count value to a threshold number;

increase the threshold number in response to the threshold number not being exceeded within the particular period of time;

invoke a security action when the count value exceeds the threshold number; and

provide the count value of the power cycling events to a processor external to the memory device in response to an authenticated read request; and

a system processor to host one or more applications and to initiate commands to said memory controller to provide access to said memory cell array.

15. The system of claim 14 , wherein the threshold number is 100 power cycles and the particular period of time is one month.

16. The system of claim 14 , wherein the controller is further configured to increase the threshold number in response to the threshold number not being exceeded within the particular period of time.

17. The system of claim 14 , wherein the threshold number is initially set to 100 power cycles and the particular period of time is one month, wherein the controller is further configured to increase the threshold number from 100 power cycles to 200 power cycles in response to the threshold number not being exceeded within the particular period of time.

18. The system of claim 14 , wherein the security action comprises an alarm that is at least one of audible or visible to a user of a device incorporating the memory device.

19. The system of claim 14 , wherein for the security action, the controller is further configured to power down the memory device.

20. The system of claim 14 , wherein for the security action, the controller is further configured to forbid reading of contents stored in the memory device for a particular span of time.

21. The system of claim 14 , wherein for the security action, the controller is further configured to send a message to a user to indicate a potential presence of a security attack.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 26, 2011
From: NUMONYX B.V.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 027126/0176 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 29, 2010
From: RUDELIC, JOHN
To: NUMONYX B.V.
Reel/Frame 024756/0926 →