IP Library Granted Patent US 8,012,838
Granted Patent B2
US 8,012,838 · App. 12/647,513 · Granted Sep 6, 2011

Method for fabricating lateral double diffused metal oxide semiconductor (LDMOS) transistor

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Quick Facts
Patent No.
US 8,012,838
App. No.
12/647,513
Granted
Sep 6, 2011
Kind
B2
Abstract

Disclosed is a method for fabricating a lateral double diffused metal oxide semiconductor (LDMOS) transistor, which includes implanting impurity ions onto a semiconductor substrate to form a drift region and a body region, forming a photoresist pattern to expose a region where an insulating oxide film is to be formed on the semiconductor substrate, implanting first impurity ions through the photoresist pattern to form a first impurity region, where the insulating oxide film is to be formed, in the semiconductor substrate, forming an insulating oxide film and an outer insulating oxide film on the semiconductor substrate by an oxidation process, and forming a gate electrode on the semiconductor substrate.

Claims (37)

1. A method comprising:

simultaneously forming a drift region and a body region by implanting impurity ions into a semiconductor substrate;

forming a photoresist pattern over the semiconductor substrate to expose a predetermined region of the semiconductor substrate;

forming a first impurity region over the predetermined region by implanting a first impurity ion in the semiconductor substrate through the photoresist pattern;

simultaneously forming an insulating oxide film at the predetermined region and an outer insulating oxide film over the semiconductor substrate by an oxidation process; and

forming a gate electrode over the semiconductor substrate.

2. The method of claim 1 , wherein the first impurity region is formed by implanting nitrogen.

3. The method of claim 1 , wherein the first impurity region is formed such that the first impurity region is arranged under the insulating oxide film.

4. The method of claim 1 , wherein the first impurity region is formed such that the width of the first impurity region is equivalent to that of the bottommost surface of the insulating oxide film.

5. The method of claim 1 , wherein the insulating oxide film is formed over the first impurity region and is spaced from the body region by a predetermined distance.

6. The method of claim 1 , wherein the insulating oxide film is formed such that the insulating oxide film has a thickness less than the thickness of the outer insulating oxide film.

7. The method of claim 1 , wherein the thickness of the insulating oxide film is dependent upon the depth of the first impurity region.

8. The method of claim 1 , wherein the insulating oxide film is interposed between a source region and a drain region.

9. The method of claim 1 , wherein the gate electrode is formed such that one end of the gate electrode extends to the surface of the body region and the other end thereof extends over the insulating oxide film.

10. The method of claim 1 , wherein simultaneously forming the insulating oxide film and the outer insulating oxide film comprises:

forming a nitride film over the semiconductor substrate;

patterning the nitride film to form a nitride film pattern to expose the predetermined region; and then

performing an oxidation process on the semiconductor substrate exposed by the nitride film pattern.

11. The method of claim 1 , further comprising:

forming a source region and a drain region on the exposed body region and drift region using the gate electrode, the insulating oxide film and the outer insulating oxide film as ion-implantation masks.

12. The method of claim 1 , wherein the predetermined region comprises a region where the insulating oxide film is formed.

13. A method comprising:

simultaneously forming a drift region and a body region into a semiconductor substrate;

forming a first impurity region over a predetermined region;

simultaneously forming an insulating oxide film at the predetermined region and an outer insulating oxide film spaced from the insulating oxide film over the semiconductor substrate;

forming a gate electrode over the semiconductor substrate, wherein one end of the gate electrode extends to the body region and another end of the gate electrode extends over and contacts the insulating oxide film; and then

forming a source region and a drain region on the exposed body region and drift region using the gate electrode, the insulating oxide film and the outer insulating oxide film as ion-implantation masks.

14. The method of claim 13 , wherein the first impurity region is formed by implanting nitrogen.

15. The method of claim 13 , wherein the first impurity region is formed such that the first impurity region is arranged directly under the insulating oxide film.

16. The method of claim 13 , wherein the first impurity region is formed such that the width of the first impurity region is equivalent to the width of the bottommost surface of the insulating oxide film.

17. The method of claim 13 , wherein the thickness of the insulating oxide film is dependent upon the depth of the first impurity region.

18. The method of claim 13 , wherein the insulating oxide film is interposed between the source region and the drain region.

19. The method of claim 13 , wherein simultaneously forming the insulating oxide film and the outer insulating oxide film comprises:

forming a nitride film over the semiconductor substrate;

patterning the nitride film to form a nitride film pattern to expose the predetermined region; and then

performing an oxidation process on the semiconductor substrate exposed by the nitride film pattern.

20. The method of claim 13 , wherein the predetermined region comprises a region where the insulating oxide film is formed.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 5, 2020
From: COLUMBA TECHNOLOGIES, INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 052845/0474 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2019
From: DB HITEK CO., LTD.
To: COLUMBA TECHNOLOGIES INC.
Reel/Frame 049709/0857 →
CHANGE OF NAME Recorded Nov 30, 2017
From: DONGBU HITEK CO., LTD.
To: DB HITEK CO., LTD.
Reel/Frame 044559/0819 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2009
From: KIM, NAM-JOO
To: DONGBU HITEK CO., LTD.
Reel/Frame 023704/0673 →