Fuse structure for high integrated semiconductor device
View Patent ↗The present invention provides a technology capable of improving an operation reliability of a semiconductor device. Particularly, a fuse material which constitutes the copper can be prevented from migrating being locked in the recesses or the grooves after a blowing process. A semiconductor device includes an insulating layer including a concave-convex-shaped upper part; and a fuse formed on the insulating layer.
1. A semiconductor device, comprising:
an insulating layer provided over a substrate, the insulating layer including first and second trenches and a pillar defined by the first and second trenches; and
a fuse formed over the insulating layer and having a blowing region, the fuse extending into the first and the second trenches and provided over the pillar,
wherein each of the first and second trenches has a convex bottom surface, and
wherein a side region of the convex bottom surface is deeper than a center region of the convex bottom surface.
2. The semiconductor device according to claim 1 , wherein the insulating layer includes a plurality of trenches that are formed across to a major axis of the fuse,
wherein the semiconductor device further comprises additional trenches.
3. The semiconductor device according to claim 2 , wherein the pillar defined by the first and the second trenches at least partly overlaps with the blowing region of the fuse, and
wherein the first and the second trenches have wider widths than the remaining plurality of trenches.
4. The semiconductor device according to claim 2 , wherein the pillar defines the blowing region of the fuse, and
wherein widths of the trenches are wider as the trenches become closer to the blowing region.
5. The semiconductor device according to claim 1 , wherein the first and the second trenches extend to both directions with respect to a major axis of the fuse.
6. The semiconductor device according to claim 5 , the device further comprising additional trenches extending to both directions with respect to the major axis of the fuse,
wherein the additional trenches are located farther away from the blowing region than the first and the second trenches,
wherein the first and the second trenches are arranged in a row direction and a column direction, and
wherein the first and the second trenches disposed near the blowing region of the fuse have wider widths than the additional trenches.
7. The semiconductor device according to claim 6 , wherein a depth of the first trench of the insulating layer is about 50% of a thickness of the fuse.