IP Library Granted Patent US 9,483,399
Granted Patent B2
US 9,483,399 · App. 12/650,952 · Granted Nov 1, 2016

Sub-OS virtual memory management layer

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,483,399
App. No.
12/650,952
Granted
Nov 1, 2016
Kind
B2
Abstract

A binary memory image in system is modified. The system may or may not already have virtual memory management enabled. Virtual memory management is enabled and/or modified by inserting a sub-OS virtual memory management layer in the binary memory image. Part of the binary memory image may be compressed to make room for the sub-OS virtual memory management layer.

Claims (23)

1. A method comprising:

compressing at least a portion of a binary image to create free space in the binary image, wherein the binary image comprises a real-time operating system that is not configured to utilize virtual memory management;

inserting virtual memory management components into the free space in the binary image, wherein the virtual memory management components are configured to modify registers within a memory management unit of a processor executing the real-time operating system to enable virtual memory management, generate one or more virtual memory fault handlers in the binary image, wherein the virtual memory fault handlers are executed responsive to detecting a page fault, and modify one or more abort vectors of the binary image to point to a first virtual memory fault handler; and

storing the modified binary image in the nonvolatile memory,

wherein the modified binary image is configured to utilize the memory management unit without accessing the real-time operating system.

2. The method of claim 1 wherein compressing comprises compressing executable code.

3. The method of claim 1 further comprising reserving at least a portion of the free space for virtual memory pages.

4. A method comprising:

generating a binary image, wherein the binary image comprises a real-time operating system that is not configured to utilize virtual memory management;

compressing at least a portion of the binary image to create space in the binary image for memory management components in a nonvolatile memory, wherein the memory management components are configured to modify registers within a memory management unit of a processor executing the real-time operating system to enable virtual memory management, generate one or more virtual memory fault handlers in the binary image, wherein the virtual memory fault handlers are executed responsive to detecting a page fault, and modify one or more abort vectors of the binary image to point to a first virtual memory fault handler;

inserting the memory management components in the space in the binary image; and

storing the binary image in nonvolatile memory in an electronic device

wherein the memory management components do not access to the portion of the binary image.

5. The method of claim 4 , wherein the electronic device comprises a mobile phone.

6. The method of claim 4 , wherein the electronic device comprises a set-top box.

7. The method of claim 4 , wherein the electronic device comprises a network router.

8. A non-transitory computer-readable medium having instructions stored thereon that when accessed result in a device performing:

reserving space in a binary image from a non-virtual electronic system responsive, at least in part, to compressing at least a portion of the binary image, wherein the binary image comprises a real-time operating system that is not configured to utilize virtual memory management;

inserting virtual memory management components into the reserved space in the binary image, wherein the virtual memory management components are configured to modify registers within a memory management unit of a processor executing the real-time operating system to enable virtual memory management, generate one or more virtual memory fault handlers in the binary image, wherein the virtual memory fault handlers are configured to handle memory faults and page swaps between random access memory and a non-volatile memory in response to a page fault, and modify one or more abort vectors of the binary image to point to a first virtual memory fault handler; and

loading the binary image with the virtual memory management components in the electronic system

wherein the virtual memory management components do not access the portion of the binary image.

9. The non-transitory computer-readable medium of claim 8 wherein inserting virtual memory management components into the reserved space in the binary image further comprises modifying abort vectors to point to the memory fault handlers.

10. The non-transitory computer-readable medium of claim 8 wherein compressing at least a portion of the binary image comprises compressing non-boot code.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 26, 2011
From: NUMONYX B.V.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 027126/0176 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2010
From: HULBERT, JARED E; WANG, HONGYU
To: NUMONYX B.V.
Reel/Frame 024685/0898 →