USB host controller and controlling method for USB host controller
The present invention aims to provide a USB host controller capable of reducing time for a data transfer between storage devices. A USB host controller according to the present invention includes a buffer memory for USB pipe having a first buffer memory region and a second buffer memory region, and a buffer memory controller configured to control a data transfer between the buffer memory for USB pipe and each of first and second devices. The buffer memory controller stores data from the first device in the first buffer memory region, swaps address information corresponding to the first buffer memory region and address information corresponding to the second buffer memory region, and transfers data stored in the first buffer memory region to the second device, on the basis of the address information corresponding to the first buffer memory region after the swapping.
1. A USB host controller comprising:
a buffer memory comprising a first buffer memory region and a second buffer memory region; and
a buffer memory controller configured to control a data transfer between a first device and the buffer memory and a data transfer between a second device and the buffer memory, wherein
the buffer memory controller
holds address information corresponding to the first buffer memory region and address information corresponding to the second buffer memory region,
stores data from the first device into the first buffer memory region,
swaps the address information corresponding to the first buffer memory region and the address information corresponding to the second buffer memory region, and
transfers the data stored in the first buffer memory region to the second device, on the basis of the address information corresponding to the first buffer memory region after the swapping.
2. The USB host controller according to claim 1 , wherein
the buffer memory controller has a plurality of USB pipe control blocks each of which stores the address information and transfers the data based on the address information.
3. The USB host controller according to claim 1 , wherein
the buffer memory controller includes a first USB pipe control block, a second USB pipe control block, and a memory swap control block for swapping the address information of the first USB pipe control block and the address information of the second USB pipe control block,
the first USB pipe control block holds the address information corresponding to the first buffer memory region, and stores the data from the first device in the first buffer memory region,
the second USB pipe control block holds the address information corresponding to the second buffer memory region,
after the first USB pipe control block stores the data from the first device in the first buffer memory region, the memory swap control block swaps the address information corresponding to the first buffer memory region that is held by the first USB pipe control block and the address information corresponding to the second buffer memory region that is held by the second USB pipe control block, and thereby causes the second USB pipe control block to hold the address information corresponding to the first buffer memory region, and
the second USB pipe control block transfers the data stored in the first buffer memory region to the second device.
4. The USB host controller according to claim 1 , wherein the address information corresponding to each of the first and second buffer memory regions includes address information of the each of the first and the second buffer memory regions and size of data stored in the each of the first and second buffer memory regions.
5. The USB host controller according to claim 1 , wherein the address information corresponding to each of the first and second buffer memory regions includes a start point address of the each of the first and second buffer memory regions and size of data stored in the each of the first and second buffer memory regions.
6. The USB host controller according to claim 1 , wherein the address information corresponding to each of the first and second buffer memory regions includes a start point address and an end point address of the each of the first and second buffer memory regions.
7. The USB host controller according to claim 1 , wherein the buffer memory controller swaps the address information corresponding to the first buffer memory region and the address information corresponding to the second buffer memory region, after the second buffer memory region becomes empty.
8. The USB host controller according to claim 1 , wherein the buffer memory controller
stores data from the second device into the second buffer memory region, and
transfers the data stored in the second buffer memory region to the first device, on the basis of the address information corresponding to the second buffer memory region after the swapping.
9. The USB host controller according to claim 1 , wherein the buffer memory controller comprises a USB PIPE control block that is configured to hold address information, and
wherein if the USB PIPE control block holds the address information corresponding to the first buffer memory region before the swapping, then the USB PIPE control block holds the address information corresponding to the second buffer memory region after the swapping.
10. The USB host controller according to claim 1 , wherein the buffer memory controller comprises a USB PIPE control block that is configured to hold address information, and
wherein if the USB PIPE control block holds the address information corresponding to the first buffer memory region before the swapping, then the swapping includes rewriting the address information held by the USB PIPE control block with the address information corresponding to the second buffer memory region.
11. The USB host controller according to claim 1 , wherein the buffer memory controller transfers the data stored in the first buffer memory region to the second device without first transferring the data to a memory located outside the USB host controller.
12. The USB host controller according to claim 2 , wherein the address information corresponding to each of the first and second buffer memory regions includes a start point address and an end point address of the each of the first and second buffer memory regions.
13. The USB host controller according to claim 3 , wherein the address information corresponding to each of the first and second buffer memory regions includes a start point address and an end point address of the each of the first and second buffer memory regions.
14. A controlling method for a USB host controller, the controller including: a buffer memory having a first buffer memory region and a second buffer memory region, and a buffer memory controller configured to control a data transfer between a first device and the buffer memory and a data transfer between a second device and the buffer memory, the method comprising:
storing data from the first device into the first buffer memory region;
swapping address information corresponding to the first buffer memory region and address information corresponding to the second buffer memory region held by the buffer memory controller; and
transferring the data stored in the first buffer memory region to the second device, on the basis of the address information corresponding to the first buffer memory region after the swapping.