IP Library Granted Patent US 8,053,337
Granted Patent B2
US 8,053,337 · App. 12/659,991 · Granted Nov 8, 2011

Method of manufacturing semiconductor device

Assignee: Renesas Electronics Corporation
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Quick Facts
Patent No.
US 8,053,337
App. No.
12/659,991
Granted
Nov 8, 2011
Kind
B2
Abstract

In a method of manufacturing a semiconductor device, a first groove and a second groove each having a width less than that of a scribe line are formed along the scribe line in a first protective film provided below a second protective film which protects element forming regions when a wafer is divided into parts by a laser dicing, and the first groove and the second groove are filled with the second protective film. Then, the laser dicing is performed on a region between the first groove and the second groove along the scribe line from the surface where the second protective film is formed to form a cutting groove that reaches at least a predetermined depth of the multi-layer interconnect.

Claims (34)

1. A method of manufacturing a semiconductor device, the method comprising:

forming a first groove and a second groove in a first protective layer along a scribe line, said first protective layer being formed over a multi-layer interconnect which is formed over one surface of a wafer, over which a plurality of element forming regions partitioned by a plurality of said scribe lines are formed, and each of said first groove and said second groove comprising a width less than that of said scribe line;

forming a second protective film that fills said first groove and said second groove and covers said first protective film, over said first protective film; and

forming a cutting groove that reaches at least a predetermined depth of said multi-layer interconnect by performing a laser dicing on a region between said first groove and said second groove along said scribe line from a surface where said second protective film is formed.

2. The method of manufacturing a semiconductor device as set forth in claim 1 , wherein said multi-layer interconnect includes a low-dielectric-constant film having a relative dielectric constant smaller than that of SiO 2 , and

wherein, in said forming said cutting groove, said cutting groove is formed such that at least said low-dielectric-constant film of said multi-layer interconnect is cut by the laser dicing.

3. The method of manufacturing a semiconductor device as set forth in claim 2 , wherein said low-dielectric-constant film comprises a porous film.

4. The method of manufacturing a semiconductor device as set forth in claim 1 , wherein, in said forming said cutting groove, said cutting groove is formed to at least a predetermined depth of said wafer by the laser dicing.

5. The method of manufacturing a semiconductor device as set forth in claim 1 , wherein an aspect ratio (depth/width) of each of said first groove and said second groove is equal to or more than 0.1 and equal to or less than 2.5.

6. The method of manufacturing a semiconductor device as set forth in claim 1 , wherein said first protective film comprises a polyimide film.

7. The method of manufacturing a semiconductor device as set forth in claim 1 , wherein, in said forming said first groove and said second groove, said first groove and said second groove are formed over said scribe line.

8. The method of manufacturing a semiconductor device as set forth in claim 1 , further comprising cutting said wafer into parts each including each of said plurality of element forming regions with a dicing blade along said plurality of scribe lines after said forming said cutting groove,

wherein the width of said dicing blade is less than a width between the outer ends of said cutting groove.

9. A method of manufacturing a semiconductor device, comprising:

preparing a wafer comprising:

a multi-layer interconnect formed over one surface of said wafer;

a first protective layer formed over said multi-layer interconnect;

a first groove and a second groove provided in said first protective layer along a scribe line, said first groove and second groove having a width less than a width of said scribe line; and

a plurality of element forming regions partitioned by a plurality of said scribe lines;

forming a second protective film that fills said first groove and said second groove and covers said first protective film, over said first protective film; and

forming a cutting groove that reaches at least a predetermined depth of said multi-layer interconnect by performing a laser dicing on a region between said first groove and said second groove along said scribe line from a surface where said second protective film is formed.

10. The method of manufacturing a semiconductor device as set forth in claim 9 , wherein said multi-layer interconnect includes a low-dielectric-constant film having a relative dielectric constant smaller than that of SiO 2 , and

in said forming said cutting groove, said cutting groove is formed such that at least said low-dielectric-constant film of said multi-layer interconnect is cut by the laser dicing.

11. The method of manufacturing a semiconductor device as set forth in claim 10 , wherein said low-dielectric-constant film comprises a porous film.

12. The method of manufacturing a semiconductor device as set forth in claim 9 , wherein, in said forming said cutting groove, said cutting groove is formed to at least a predetermined depth of said wafer by the laser dicing.

13. The method of manufacturing a semiconductor device as set forth in claim 9 , wherein an aspect ratio (depth/width) of each of said first groove and said second groove is equal to or more than 0.1 and equal to or less than 2.5.

14. The method of manufacturing a semiconductor device as set forth in claim 9 , wherein said first protective film comprises a polyimide film.

15. The method of manufacturing a semiconductor device as set forth in claim 9 , wherein, in said forming said first groove and said second groove, said first groove and said second groove are formed over said scribe line.

16. The method of manufacturing a semiconductor device as set forth in claim 9 , further comprising cutting said wafer into parts each including each of said plurality of element forming regions with a dicing blade along said plurality of scribe lines after said forming said cutting groove,

wherein the width of said dicing blade is less than a width between the outer ends of said cutting groove.

17. The method of manufacturing a semiconductor device as set forth in claim 9 , wherein said scribe lines comprise a first scribe line and a second scribe line, said first scribe line and said second scribe line crossing each other,

wherein said first groove is formed along said first scribe line,

said wafer comprising a third groove in said first protective layer along said second scribe line, said third groove having a width that is less than a width of said second scribe line, and

wherein said first groove and said third groove cross each other.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Oct 26, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025193/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2010
From: NODA, TAKAMITSU
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024189/0415 →
Priority Claims (1)
JP 2009-104554 · Apr 22, 2009 · national
Continuity (1)
Related Publication 20100273312A1 · Oct 28, 2010