Bipolar transistor including conductive first and second protection layers
A bipolar transistor at least includes a semiconductor substrate including an N − epitaxial growth layer and a P − silicon substrate, an N + polysilicon layer, a tungsten layer, two silicide layers, a base electrode, an emitter electrode, and a collector electrode. The N + polysilicon layer formed on the semiconductor substrate is covered with one of the silicide layers. The tungsten layer that is formed on the silicide layer is covered with the other silicide layer.
1. A bipolar transistor comprising:
a semiconductor substrate that includes an epitaxial growth layer;
a polysilicon layer that is formed on the semiconductor substrate;
a conductive first protection layer that covers the polysilicon layer;
a metal layer that is formed on the conductive first protection layer;
a conductive second protection layer that covers the metal layer; and
an emitter electrode that is formed on the conductive second protection layer.
2. The bipolar transistor according to claim 1 , further comprising:
an insulation layer that contacts with the semiconductor substrate; and
a base electrode that is formed on the insulation layer.
3. The bipolar transistor according to claim 2 , wherein a parasitic capacitance is determined according to a thickness of the insulation layer.
4. The bipolar transistor according to claim 2 , wherein the insulation layer is formed of a BPSG.
5. The bipolar transistor according to claim 1 , further comprising an element isolation zone that is formed in the semiconductor substrate.
6. The bipolar transistor according to claim 1 , wherein the semiconductor substrate is a collector electrode.
7. The bipolar transistor according to claim 1 , wherein the conductive first protection layer and the conductive second protection layer are formed of silicide.
8. The bipolar transistor according to claim 1 , wherein the metal layer is formed of tungsten.
9. The bipolar transistor according to claim 1 ; wherein a thickness Y1 of the polysilicon layer satisfies 100 nm<Y1<320 nm.
10. The bipolar transistor according to claim 1 , wherein N impurities are introduced into the polysilicon layer.
11. The bipolar transistor according to claim 1 , wherein the semiconductor substrate is formed of silicon.