IP Library Granted Patent US 8,871,628
Granted Patent B2
US 8,871,628 · App. 12/689,927 · Granted Oct 28, 2014

Electrode structure, device comprising the same and method for forming electrode structure

Inventor: Sang In Lee (Sunnyvale, CA)
Assignee: Veeco ALD Inc.
H01L21/02554H01L21/02565H01L21/02576H01L21/02579H01L21/0262H01L31/022466H01L31/078H01L31/1884H01L31/075Y02E10/50
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Quick Facts
Patent No.
US 8,871,628
App. No.
12/689,927
Granted
Oct 28, 2014
Kind
B2
Abstract

An electrode structure comprises a semiconductor junction comprising an n-type semiconductor layer and a p-type semiconductor layer; a hole exnihilation layer on the p-type semiconductor layer; and a transparent electrode layer on the hole exnihilation layer. The electrode structure further comprises a conductive layer between the hole exnihilation layer and the transparent electrode layer. In the electrode structure, one or more of the hole exnihilation layer, the conductive layer and the transparent electrode layer may be formed by an atomic layer deposition. In the electrode structure, a transparent electrode formed of a degenerated n-type oxide semiconductor does not come in direct contact with a p-type semiconductor, and thus, annihilation or recombination of holes generated in the p-type semiconductor can be reduced, which increases the carrier generation efficiency. Further, the electric conductivity of the transparent electrode is increased by the conductive layer, which improves electrical characteristics of a device.

Claims (21)

1. A method for forming an electrode structure, comprising:

preparing a semiconductor junction comprising an n-type semiconductor layer and a p-type semiconductor layer in direct contact with the n-type semiconductor layer or with an intrinsic semiconductor layer sandwiched between the n-type semiconductor layer and the p-type semiconductor layer;

forming a hole exnihilation layer on the p-type semiconductor layer, comprising:

exposing the semiconductor junction to a source precursor; and

exposing the semiconductor junction to a reactant precursor containing oxygen atoms; and

forming a transparent electrode layer on the hole exnihilation layer,

wherein at least one of the hole exnihilation layer or the transparent electrode layer is formed by atomic layer deposition.

2. The method according to claim 1 , wherein the source precursor comprises any one selected from the group consisting of Ni(dmamb) 2 , Co(dmamb) 2 , Cu(dmamb) and a combination thereof.

3. The method according to claim 1 , wherein exposing the semiconductor junction to the source precursor comprises:

exposing the semiconductor junction to a first source precursor comprising any one selected from the group consisting of Ni(dmamb) 2 , Co(dmamb) 2 , Cu(dmamb) and a combination thereof; and

exposing the semiconductor junction to a second source precursor comprising any one selected from the group consisting of tetra-dimethyl-amino-titanium, tetra-diethyl-amino-titanium, tetra-ethyl-methyl-amino-titanium and a combination thereof.

4. The method according to claim 3 , wherein exposing the semiconductor junction to the first source precursor and exposing the semiconductor junction to the second source precursor are simultaneously performed.

5. The method according to claim 3 , wherein exposing the semiconductor junction to the source precursor further comprises exposing the semiconductor junction to a reactant precursor, after exposing the semiconductor junction to the first source precursor and before exposing the semiconductor junction to the second source precursor.

6. The method according to claim 1 , wherein the reactant precursor comprises any one selected from the group consisting of O 2 , N 2 O, H 2 O, O 3 , O 2 plasma, N 2 O plasma, H 2 O plasma, O* radical and a combination thereof.

7. The method according to claim 1 , further comprising forming a conductive layer on the hole exnihilation layer after forming the hole exnihilation layer, wherein the transparent electrode layer is formed on the conductive layer.

8. The method according to claim 7 , wherein the conductive layer is formed by atomic layer deposition.

9. The method according to claim 8 , wherein forming the conductive layer comprises:

exposing the hole exnihilation layer to a source precursor; and

exposing the hole exnihilation layer to a reactant precursor containing hydrogen atoms.

10. The method according to claim 9 , wherein the source precursor comprises any one selected from the group consisting of trimethylaluminum, dimethylaluminumhydride, Ni(dmamb) 2 , Co(dmamb) 2 , Cu(dmamb), ruthenium cyclopentadienyl, bis(ethylcyclopentadienyl)ruthenium), (2,4-dimethylpentadienyl)(ethylcyclopentadienyl)ruthenium and a combination thereof.

11. The method according to claim 10 , wherein the reactant precursor comprises any one selected from the group consisting of H 2 plasma, NH 3 plasma, H* radical and a combination thereof.

Assignments (4)
CHANGE OF NAME Recorded Nov 7, 2013
From: SYNOS TECHNOLOGY, INC.
To: VEECO ALD INC.
Reel/Frame 031599/0531 →
RELEASE OF SECURITY INTEREST Recorded Mar 29, 2012
From: NOVELLUS DEVELOPMENT COMPANY, LLC
To: SYNOS TECHNOLOGY, INC.
Reel/Frame 027956/0025 →
SECURITY AGREEMENT Recorded Mar 30, 2010
From: SYNOS TECHNOLOGY, INC.
To: NOVELLUS DEVELOPMENT COMPANY, LLC
Reel/Frame 024161/0267 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2010
From: LEE, SANG IN
To: SYNOS TECHNOLOGY, INC.
Reel/Frame 023812/0670 →
Continuity (2)
Provisional Application 61146161 · Jan 21, 2009
Related Publication 20100181566A1 · Jul 22, 2010