IP Library Granted Patent US 8,193,869
Granted Patent B1
US 8,193,869 · App. 12/699,732 · Granted Jun 5, 2012

Feedthrough capacitance compensation for resonant devices

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Quick Facts
Patent No.
US 8,193,869
App. No.
12/699,732
Granted
Jun 5, 2012
Kind
B1
Abstract

A device has a resonator coupled to input and output nodes, the resonator being characterized by a transducer to drive the output node, and further characterized by a feedthrough capacitance such that portions of the input signal bypass the transducer to allow a spurious signal to reach the output node. The device includes a compensation capacitor coupled to the output node to define a compensation capacitance in accordance with the feedthrough capacitance. A phase inversion circuit is coupled to the compensation capacitance to generate a compensation signal and coupled to the output node such that the spurious signal is offset by the compensation signal. In some cases, a differential amplifier of the phase inversion circuit has the compensation capacitance in a feedback path to offset the feedthrough capacitance. In these and other cases, the compensation capacitance and the feedthrough capacitance may be unmatched to avoid overcompensation.

Claims (32)

1. A device comprising:

a drive voltage source to provide a drive signal;

a phase inversion circuit coupled to the drive voltage source and having an in-phase node and an inversion node; and

a resonator array including first and second sets of resonators, each resonator of which is configured for selective activation and coupled to the drive voltage source for excitation of the resonator via the drive signal;

wherein each resonator in the first set is coupled to the in-phase node along a respective one of a plurality of parallel in-phase paths, and wherein each resonator in the second set is coupled to the inversion node along a respective one of a plurality of parallel inversion paths; and

wherein the first and second sets of resonators include a matching number of multiple resonators such that each resonator in the first set is paired with a companion resonator in the second set to offset a feedthrough capacitance of each resonator.

2. The device of claim 1 , wherein the phase inversion circuit is configured such that the feedthrough capacitances of the first set of resonators are unmatched with the feedthrough capacitances of the second set of resonators to avoid overcompensation.

3. The device of claim 1 , further comprising first and second tunable capacitors that couple the phase inversion circuit to the plurality of parallel in-phase paths and the plurality of parallel inversion paths, respectively.

4. The device of claim 3 , wherein the first and second tunable capacitors are tuned such that each resonator in the first set and its companion resonator in the second set present unmatched feedthrough capacitances.

5. The device of claim 3 , wherein the first and second tunable capacitors are tuned such that the feedthrough capacitances presented by the companion resonators in the second set are below the feedthrough capacitances presented by the respective resonators in the first set.

6. The device of claim 1 , wherein the phase inversion circuit comprises a center-tapped transformer having an input winding driven by the drive voltage source and a pair of output windings coupled to the plurality of parallel in-phase paths and the plurality of parallel inversion paths, respectively.

7. The device of claim 1 , wherein the plurality of parallel in-phase paths and the plurality of inversion paths terminate at a common output.

8. The device of claim 1 , wherein each resonator in the first and second sets of resonators comprises a micromechanical resonator having a drive electrode coupled to the drive voltage source.

9. The device of claim 1 , wherein the phase inversion circuit comprises a differential amplifier.

10. The device of claim 9 , wherein the plurality of parallel in-phase paths are coupled to a non-inverting input of the differential amplifier, and wherein the plurality of parallel inversion paths are coupled to an inverting input of the differential amplifier.

11. The device of claim 9 , wherein the plurality of parallel in-phase paths are coupled to a non-inverting output of the differential amplifier, and wherein the plurality of parallel inversion paths are coupled to an inverting output of the differential amplifier.

12. The device of claim 9 , wherein an inverting output of the differential amplifier is coupled to an unconnected pad.

13. The device of claim 9 , wherein an inverting input of the differential amplifier is coupled to an unconnected pad.

14. The device of claim 1 , wherein the phase inversion circuit comprises a series of amplification stages, each of which comprises a differential amplifier.

15. The device of claim 14 , wherein the phase inversion circuit further comprises a plurality of tunable phase shifters, each of which is disposed between successive amplification stages of the series of amplification stages.

16. The device of claim 1 , further comprising a bias voltage source for the selective activation of a resonator in the first set such that all other resonators in the first set, and all resonators in the second set, are not activated.

17. The device of claim 1 , further comprising a plurality of bias voltage sources, each bias voltage source being coupled to a respective resonator in the first or second sets of resonators for the selective activation of the respective resonator independent of the bias voltage sources of the other resonators in the first or second sets.

18. A method of compensating for resonator feedthrough capacitance in a device comprising a resonator array including a first set of resonators disposed in a plurality of parallel in-phase paths, respectively, and further including a second set of resonators disposed in a plurality of parallel inversion paths, respectively, the first and second sets including a matching number of multiple resonators such that each resonator in the first set is paired with a companion resonator in the second set, the method comprising the steps of:

generating a drive signal;

exciting each resonator in the first and second sets via the drive signal concurrently;

selecting a resonator in either the first set or the second set for activation;

applying a bias voltage to the selected resonator; and

receiving an output of the selected resonator after signals along the in-phase paths and the inversion paths have been combined to offset the feedthrough capacitance of each resonator in the resonator array.

19. The method of claim 18 , further comprising the step of adjusting a tunable capacitor coupled to the plurality of in-phase paths or the plurality of inversion paths.

20. The method of claim 19 , wherein the adjusting step includes tuning the tunable capacitor such that the feedthrough capacitances presented by the resonators in the second set are below the feedthrough capacitances presented by the resonators in the first set.

21. The method of claim 18 , wherein only a single resonator in the first and second sets of resonators is activated.

22. The method of claim 18 , further comprising the steps of selecting a further resonator in either the first set or the second set for activation, and applying the bias voltage to the further resonator concurrently with the first applying step.

Assignments (11)
INTELLECTUAL PROPERTY BUY-IN AGREEMENT/ASSIGNMENT Recorded Apr 4, 2023
From: MICREL LLC
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 063241/0771 →
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 4, 2013
From: DISCERA, INC.
To: MICREL, INCORPORATED
Reel/Frame 031346/0685 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 14, 2012
From: BROWN, ANDREW R.; HSU, WAN-THAI; CIOFFI, KENNETH R.
To: DISCERA, INC.
Reel/Frame 027860/0517 →