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App. No. 12/700,925 · Confirmation No. 8917

SEMICONDUCTOR INTEGRATED CIRCUIT, METHOD OF TESTING SEMICONDUCTOR INTEGRATED CIRCUIT, AND METHOD OF DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT

Inventor: Kuninobu FUJII
Abandoned -- Failure to Respond to an Office Action View Publication ↗
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2013-08-28 ABN Abandonment 2 View
2013-02-13 CTRS Requirement for Restriction/Election 6 View
2013-02-13 FWCLM Index of Claims 1 View
2010-08-12 NTC.PUB Notice of Publication 1 View
2010-03-29 PD.FILED.E Priority Documents electronically retrieved by USPTO from a participating IP Office 38 View
2010-02-26 APP.FILE.REC Filing Receipt 3 View
2010-02-05 TRNA Transmittal of New Application 3 View
2010-02-05 ADS Application Data Sheet 2 View
2010-02-05 SPEC Specification 22 View
2010-02-05 CLM Claims 4 View
2010-02-05 ABST Abstract 1 View
2010-02-05 DRW Drawings-only black and white line drawings 17 View
2010-02-05 OATH Oath or Declaration filed 3 View
2010-02-05 TRAN.LET Transmittal Letter 3 View
2010-02-05 136A Authorization for Extension of Time all replies 3 View
2010-02-05 IDS Information Disclosure Statement (IDS) Form (SB08) 1 View
2010-02-05 FOR Foreign Reference 18 View
2010-02-05 WFEE Fee Worksheet (SB06) 2 View
2010-02-05 N417 Electronic Filing System Acknowledgment Receipt 3 View
2010-02-05 WFEE Fee Worksheet (SB06) 1 View
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Quick Facts
App. No.
12/700,925
Filed
2010-02-05
Pub. No.
US20100205493A1
Art Unit
2112