IP Library Granted Patent US 8,563,372
Granted Patent B2
US 8,563,372 · App. 12/704,013 · Granted Oct 22, 2013

Methods of forming contact structures including alternating metal and silicon layers and related devices

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,563,372
App. No.
12/704,013
Granted
Oct 22, 2013
Kind
B2
Abstract

A method of forming a semiconductor device, the method comprising providing a semiconductor layer, and providing a first layer of a first metal on the semiconductor layer. A second layer may be provided on the first layer of the first metal. The second layer may include a layer of silicon and a layer of a second metal, and the first and second metals may be different. The first metal may be titanium and the second metal may be nickel. Related devices, structures, and other methods are also discussed.

Claims (65)

1. A method of forming a semiconductor device, the method comprising:

providing a semiconductor layer;

providing a first layer of a first metal on the semiconductor layer;

providing a second layer on the first layer of the first metal, wherein the second layer includes a layer of silicon and a layer of a second metal, and wherein the first and second metals are different, wherein the layer of silicon comprises at least two layers of silicon and wherein the layer of the second metal comprises at least one layer of the second metal separating the at least two layers of silicon; and

annealing the second layer including the at least two layers of silicon and the at least one layer of the second metal, such that the annealing forms a silicide layer including the second metal while maintaining at least a portion of the first layer of the first metal between the silicide layer and the semiconductor layer.

2. A method according to claim 1 wherein at least one of the layers of silicon is between the layer of the second metal and the first layer of the first metal.

3. A method according to claim 1 wherein the first metal comprises titanium and the second metal comprises nickel.

4. A method according to claim 1 wherein the first metal comprises titanium, wherein the second metal comprises nickel, and wherein annealing the at least two layers of silicon and the at least one layer of the second metal comprising nickel to form the silicide layer comprises annealing at a temperature that does not exceed about 500 degrees C.

5. A method according to claim 1 wherein providing the second layer comprises providing a plurality of alternating layers of silicon and the second metal, wherein all of the layers of the second metal are separated from the first layer of the first metal by at least one of the layers of silicon.

6. A method according to claim 1 further comprising:

providing a metal cap layer on the second layer including the at least two layers of silicon and the at least one layer of the second metal wherein the metal cap layer and the second metal comprise different materials.

7. A method according to claim 6 wherein the first metal comprises titanium, the second metal comprises nickel, and the metal cap layer comprises at least one of platinum, palladium, and/or gold.

8. A method according to claim 1 wherein providing the semiconductor layer comprises,

providing a group III nitride heterojunction structure providing a 2-dimensional electron gas, and

providing a doped region providing electrical coupling between the layer of the first metal and the 2-dimensional electron gas.

9. A method according to claim 1 wherein the first metal comprises titanium, wherein the second metal comprises nickel, and wherein an atomic weight percent of silicon in the second layer is in the range of about 45 percent to about 55 percent, the method further comprising:

providing a metal cap layer on the second layer wherein the metal cap layer comprises at least one of platinum, palladium, and/or gold.

10. A method of forming a semiconductor device, the method comprising:

providing a group III nitride semiconductor layer;

providing a layer of a first metal on the group III nitride semiconductor layer wherein the first metal comprises titanium; and

providing a silicide layer on the layer of the first metal, wherein the silicide layer includes a second metal and the second metal comprises nickel, such that providing the silicide layer comprises maintaining at least a portion of the first metal layer between the silicide layer and the group III nitride semiconductor layer after providing the silicide layer.

11. A method according to claim 10 further comprising:

providing a layer of a third metal on the silicide layer wherein the third metal is different that the first and second metals.

12. A method according to claim 11 wherein the third metal comprises at least one of platinum, palladium, and/or gold.

13. A method according to claim 10 wherein providing the group III semiconductor nitride layer comprises,

providing a group III nitride heterojunction structure providing a 2-dimensional electron gas, and

providing a doped region providing electrical coupling between the layer of the first metal and the 2-dimensional electron gas.

14. A method according to claim 10 wherein providing the silicide layer comprises,

providing at least two layers of silicon and a layer of the second metal on the layer of the first metal wherein the layer of the second metal separates the at least two layers of silicon, and

annealing the at least two layers of silicon and the layer of the second metal, such that the annealing forms the silicide layer including the second metal while maintaining at least a portion of the first layer of the first metal between the silicide layer and the semiconductor layer, wherein annealing to form the silicide layer comprises annealing at a temperature that does not exceed about 500 degrees C.

15. A method according to claim 10 wherein an atomic weight percent of silicon in the silicide layer is in the range of about 45 percent to about 55 percent, the method further comprising:

providing a metal cap layer on the silicide layer wherein the metal cap layer comprises at least one of platinum, palladium, and/or gold.

16. A semiconductor device comprising:

a semiconductor layer;

a first layer of a first metal on the semiconductor layer wherein the first metal comprises titanium;

a second layer on the first layer of the first metal, wherein the second layer includes a layer of silicon and a layer of a second metal, and wherein the first and second metals are different, wherein the layer of silicon comprises at least two layers of silicon and wherein the layer of the second metal comprises at least one layer of the second metal separating the at least two layers of silicon, wherein the second metal comprises nickel, and wherein an atomic weight percent of silicon in the second layer is in the range of about 45 percent to about 55 percent; and

a metal cap layer on the second layer wherein the metal cap layer comprises at least one of platinum, palladium, and/or gold.

17. A semiconductor device according to claim 16 wherein at least one of the layers of silicon is between the at least one layer of the second metal and the first layer of the first metal.

18. A semiconductor device according to claim 16 wherein the first metal comprises titanium and the second metal comprises nickel.

19. A semiconductor device according to claim 16 wherein all of the layers of the second metal are separated from the layer of the first metal by at least one of the layers of silicon.

20. A semiconductor device according to claim 16 wherein an atomic weight percent of silicon in the second layer is in the range of about 45 percent to about 55 percent.

21. A semiconductor device according to claim 16 further comprising:

a metal cap layer on the second layer wherein a metal of the metal cap layer is different than the first and second metals.

22. A semiconductor device according to claim 21 wherein the first metal comprises titanium, the second metal comprises nickel, and the metal cap layer comprises at least one of platinum, palladium, and/or gold.

23. A semiconductor device according to claim 16 wherein the semiconductor layer comprises,

a group III nitride heterojunction structure providing a 2-dimensional electron gas, and

a doped region providing electrical coupling between the layer of the first metal and the 2-dimensional electron gas.

24. A semiconductor device comprising:

a group III nitride semiconductor layer;

a layer of a first metal on the group III nitride semiconductor layer wherein the first metal comprises titanium; and

a silicide layer on the layer of the first metal, wherein the silicide layer includes a second metal, wherein the layer of the first metal is between the silicide layer and the group III nitride semiconductor layer, and wherein the second metal comprises nickel.

25. A semiconductor device according to claim 24 further comprising:

a layer of a third metal on the silicide layer wherein the third metal is different than the first and second metals.

26. A semiconductor device according to claim 25 wherein the third metal comprises at least one of platinum, palladium, and/or gold.

27. A semiconductor device according to claim 24 wherein the group III nitride semiconductor layer comprises,

a group III nitride heterojunction structure providing a 2-dimensional electron gas, and

a doped region providing electrical coupling between the layer of the first metal and the 2-dimensional electron gas.

28. A semiconductor device according to claim 24 wherein an atomic weight percent of silicon in the silicide layer is in the range of about 45 percent to about 55 percent.

29. A semiconductor device according to claim 24 wherein an atomic weight percent of silicon in the silicide layer is in the range of about 45 percent to about 55 percent, the device further comprising:

a metal cap layer on the silicide layer wherein the metal cap layer comprises at least one of platinum, palladium, and/or gold.

30. A method of forming a semiconductor device, the method comprising:

providing a group III nitride semiconductor layer;

providing a layer of a first metal on the group III nitride semiconductor layer; and

providing a silicide layer on the layer of the first metal, wherein the silicide layer includes a second metal, wherein the first metal comprises titanium, wherein the second metal comprises nickel, and wherein an atomic weight percent of silicon in the silicide layer is in the range of about 45 percent to about 55 percent; and

providing a metal cap layer on the silicide layer wherein the metal cap layer comprises at least one of platinum, palladium, and/or gold.

Assignments (8)
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Mar 26, 2026
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 075280/0919 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Sep 30, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 072992/0113 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Sep 30, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 072992/0381 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Sep 30, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 072992/0467 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Sep 30, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 072992/0588 →
RELEASE OF SECURITY INTEREST IN INTELLECTUAL PROPERTY COLLATERAL AT REEL/FRAME NO. 64185/0755 Recorded Sep 30, 2025
From: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WOLFSPEED, INC.
Reel/Frame 072989/0001 →
SECURITY INTEREST Recorded Jun 30, 2023
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION
Reel/Frame 064185/0755 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 30, 2010
From: HAGLEITNER, HELMUT; RING, ZOLTAN; SHEPPARD, SCOTT; HENNING, JASON; GURGANUS, JASON; NAMISHIA, DAN
To: CREE, INC.
Reel/Frame 024319/0171 →