IP Library Granted Patent US 8,314,458
Granted Patent B2
US 8,314,458 · App. 12/707,734 · Granted Nov 20, 2012

Semiconductor device and method of manufacturing the same

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Quick Facts
Patent No.
US 8,314,458
App. No.
12/707,734
Granted
Nov 20, 2012
Kind
B2
Abstract

In the semiconductor device according to the present invention, a P type diffusion layer and an N type diffusion layer as a drain lead region are formed on an N type diffusion layer as a drain region. The P type diffusion layer is disposed between a source region and the drain region of the MOS transistor. When a positive ESD surge is applied to a drain electrode, causing an on-current of a parasite transistor to flow, this structure allows the on-current of the parasite transistor to take a path flowing through a deep portion of an epitaxial layer. Thus, the heat breakdown of the MOS transistor is prevented.

Claims (17)

1. A semiconductor transistor device comprising:

a semiconductor layer of a first general conductivity type;

a drain diffusion layer of the first general conductivity type formed in the semiconductor layer, the drain diffusion layer comprising a drain contact region configured to receive a drain potential from a device external to the transistor device or supply a drain potential to a device external to the transistor device;

a backgate diffusion layer of a second general conductivity type formed in the semiconductor layer;

a source diffusion layer of the first general conductivity type formed in the backgate diffusion layer; and

an additional diffusion layer of the second general conductivity type formed in the drain diffusion layer so that at least part of the additional diffusion layer is disposed between the backgate diffusion layer and the drain contact region,

wherein a sidewall of the additional diffusion layer and a sidewall of the drain contact region are in direct contact so as to form a PN junction, and the PN junction is configured to break down upon receiving a surge voltage at the drain contact region.

2. The semiconductor transistor device of claim 1 , wherein the additional drain diffusion layer has an impurity concentration higher than the drain diffusion layer, the drain contact region is part of a drain lead region of the first general conductivity type formed in the drain diffusion layer and having an impurity concentration higher than the drain diffusion layer, and part of the additional diffusion layer is disposed between the backgate diffusion layer and the drain lead region.

3. The semiconductor transistor device of claim 1 , further comprising a gate electrode formed on the semiconductor layer and an insulating spacer film formed on a side wall of the gate electrode, wherein the additional diffusion layer is disposed below the insulating spacer film and an end portion of the gate electrode, and the gate electrode overlaps the drain diffusion layer at least partially.

4. The semiconductor transistor device of claim 1 , further comprising a semiconductor substrate of the second general conductivity type on which the semiconductor layer is formed.

5. A method of manufacturing a semiconductor device, comprising:

in a semiconductor layer, forming a drain diffusion layer of a first general conductivity type, a backgate diffusion layer of a second general conductivity type and a source diffusion layer of the first general conductivity type, the drain diffusion layer comprising a drain contact region;

forming a gate electrode on the semiconductor layer;

forming an additional diffusion layer of the second general conductivity type in the drain diffusion layer using the gate electrode as a part of a mask; and

after the formation of the additional diffusion layer, forming an insulating spacer film on a side wall of the gate electrode,

wherein the additional diffusion layer is formed such that a sidewall of the additional diffusion layer and a sidewall of the drain contact region are in direct contact so as to form a PN junction, and that the PN junction is configured to break down upon receiving a surge voltage at the drain contact region.

6. The method of claim 5 , further comprising forming a drain lead region of the first general conductivity type in the drain diffusion layer so as to have an impurity concentration higher than the drain diffusion layer using the insulating spacer film as a part of a mask.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR NAME PREVIOUSLY RECORDED AT REEL: 033813 FRAME: 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jan 21, 2015
From: SYSTEM SOLUTIONS CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 034816/0510 →
CHANGE OF NAME Recorded Dec 3, 2014
From: SANYO SEMICONDUCTOR CO., LTD
To: SYSTEM SOLUTIONS CO., LTD.
Reel/Frame 034537/0044 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2014
From: SANYO SEMICONDUCTOR CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033813/0420 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT #12/577882 PREVIOUSLY RECORDED ON REEL 026594 FRAME 0385. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2014
From: SANYO ELECTRIC CO., LTD
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 032836/0342 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2011
From: SANYO ELECTRIC CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 026594/0385 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 18, 2010
From: OTAKE, SEIJI
To: SANYO ELECTRIC CO., LTD.; SANYO SEMICONDUCTOR CO., LTD.
Reel/Frame 023953/0567 →