Configurable logic integrated circuit having a multidimensional structure of configurable elements
View Patent ↗Programming of modules which can be reprogrammed during operation is described. Partitioning of code sequences is also described.
1. A configurable logic integrated circuit device comprising:
a plurality of configurable elements arranged in a two-dimensional structure;
the plurality of configurable elements are interconnected by a configurable interconnection;
at least one dedicated interface unit connecting at least some of the configurable elements via the configurable interconnection to a memory internal to the configurable logic integrated circuit adapted for storing data to be processed by one or more of the plurality of configurable elements according to a configuration of the one or more of the plurality of configurable elements;
wherein:
each of some of the plurality of configurable elements comprising:
a plurality of data processing units that are configurable via at least one data processing function—wherein:
each of at least some of the plurality of configurable elements is a logic element that is dedicated to logic processing and includes a logic processing unit;
each of at least some of the plurality of configurable elements is a data processing element that is configurable by at least one data processing function and that includes at least one arithmetic logic unit (ALU) for data processing; and
each of at least some of the plurality of configurable elements is a memory element that includes a memory for storing data to be processed as one or more operands by one or more of the plurality of configurable elements according to a configuration of the one or more of the plurality of configurable elements to produce a result, wherein the memory element includes at least one dual port memory and includes a FIFO mode; and
the configurable logic integrated circuit device is a Field Programmable Gate Array (FPGA).
2. The configurable logic integrated circuit device according to claim 1 , wherein the memory element provides a plurality of status triggers via an interface to at least one other configurable element.
3. The configurable logic integrated circuit device according to claim 2 , wherein the plurality of status triggers include at least two of information indicators including “FIFO full,” “FIFO almost-full,” “FIFO empty,” and “FIFO almost-empty.”
4. The configurable logic integrated circuit device according to claim 1 , wherein the memory element supports a stack mode.
5. The configurable logic integrated circuit device according to claim 4 , wherein the memory element provides a plurality of status triggers via an interface to at least one other configurable element.
6. The configurable logic integrated circuit device according to claim 5 , wherein the plurality of status triggers include at least one of information indicators including “Stack underrun” and “Stack overrun.”
7. The configurable logic integrated circuit device according to claim 4 , wherein the memory element includes an external interface.
8. The configurable logic integrated circuit device according to claim 7 , wherein the at least one of the plurality of configurable elements is a memory element that includes a controller for controlling the external memory.
9. The configurable logic integrated circuit device according to claim 8 , wherein the at least one of the plurality of configurable elements is a memory element that includes an address generator for the external memory.
10. The configurable logic integrated circuit device according to claim 8 , wherein the controller supports a copy operation for moving data from the embedded memory to the external memory and vice versa.
11. The configurable logic integrated circuit device according to claim 1 , wherein the memory element supports a cache mode.
12. The configurable logic integrated circuit device according to claim 11 , wherein the memory element includes a cache.
13. The configurable logic integrated circuit device according to claim 1 , wherein the memory element includes an external Interface.
14. The configurable logic integrated circuit device according to claim 13 , wherein the at least one of the plurality of configurable elements is a memory element that includes a controller for controlling the external memory.
15. The configurable logic integrated circuit device according to claim 14 , wherein the at least one of the plurality of configurable elements is a memory element that includes an address generator for the external memory.
16. The configurable logic integrated circuit device according to claim 14 , wherein the controller supports a copy operation for moving data from the local memory to the external memory and vice versa.
17. The configurable logic integrated circuit device according to claim 1 , wherein the logic processing unit is implemented based on at least one Lookup Table (LUT).
18. The configurable logic integrated circuit device according to claim 1 , wherein the logic processing unit is implemented based on logic elements.
19. The configurable logic integrated circuit device according to claim 1 , wherein the logic processing unit is implemented based on multiplexers.
20. The configurable logic integrated circuit device according to claim 1 , wherein the memory element includes an external Interface.
21. The configurable logic integrated circuit device according to claim 20 , wherein the at least one of the plurality of configurable elements is a memory element that includes a controller for controlling the external memory.
22. The configurable logic integrated circuit device according to claim 21 , wherein the at least one of the plurality of configurable elements is a memory element that includes an address generator for the external memory.
23. The configurable logic integrated circuit device according to claim 21 , wherein the controller supports a copy operation for moving data from the local memory to the external memory and vice versa.