IP Library Granted Patent US 8,362,612
Granted Patent B1
US 8,362,612 · App. 12/728,119 · Granted Jan 29, 2013

Semiconductor device and manufacturing method thereof

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,362,612
App. No.
12/728,119
Granted
Jan 29, 2013
Kind
B1
Abstract

A semiconductor device and a manufacturing method thereof are disclosed. A first insulation layer is formed on a semiconductor die, a redistribution layer electrically connected to a bond pad is formed on the first insulation layer, and a second insulation layer covers the redistribution layer. The second insulation layer is made of a cheap, non-photosensitive material. Accordingly, the manufacturing cost of the semiconductor device can be reduced.

Claims (43)

1. A semiconductor device comprising:

a semiconductor die comprising: a first surface;

a bond pad formed on the first surface; and

a passivation layer formed on the first surface, the passivation layer comprising an opening exposing the bond pad;

a redistribution layer electrically connected to the bond pad and extended over the first surface of the semiconductor die;

a solder ball attached to the redistribution layer and having sidewalls which conform only to the redistribution layer; and

an insulation layer formed on the redistribution layer to expose the solder ball upward, wherein the insulation layer is made of a non-photosensitive material.

2. The semiconductor device of claim 1 , wherein the insulation layer comprises a non-photosensitive material selected from the group consisting of an epoxy molding compound (EMC), polyimide (PI), benzocyclobutene (BCB), polybenzoxazole (PBO), bismaleimidetriazine (BT), and phenolic resin.

3. The semiconductor device of claim 1 , wherein the insulation layer comprises an insulative dry film.

4. The semiconductor device of claim 1 , wherein the insulation layer comprises epoxy.

5. The semiconductor device of claim 1 further comprising a redistribution seed layer between the redistribution layer and the bond pad and between the redistribution layer and the passivation layer.

6. The semiconductor device of claim 1 wherein the insulation layer is formed directly on the redistribution layer and the passivation layer.

7. The semiconductor device of claim 1 further comprising a first insulation layer formed on the passivation layer, the first insulation layer comprising an opening exposing the bond pad, the insulation layer being a second insulation layer.

8. The semiconductor device of claim 7 , wherein the first insulation layer is made of a photosensitive material.

9. The semiconductor device of claim 7 further comprising a redistribution seed layer between the redistribution layer and the bond pad and between the redistribution layer and the first insulation layer.

10. The semiconductor device of claim 7 wherein the second insulation layer is formed directly on the redistribution layer and the first insulation layer.

11. The semiconductor device of claim 1 , wherein the insulation layer covers a portion of the redistribution layer and is formed to have the same planar shape as that of the redistribution layer.

12. The semiconductor device of claim 1 , wherein the insulation layer has a smaller area than the first surface of the semiconductor die.

13. The semiconductor device of claim 12 wherein a periphery of the first surface of the semiconductor die is exposed from the insulation layer.

14. The semiconductor device of claim 1 , wherein the redistribution layer comprising:

a line-shaped trace; and

a ball pad connected to the trace, the solder ball being attached to the ball pad.

15. The semiconductor device of claim 14 wherein a line width of the trace is 50% or less of a diameter of the ball pad.

16. A semiconductor device comprising:

a semiconductor die comprising:

a first surface;

a bond pad formed on the first surface; and

a passivation layer formed on the first surface, the passivation layer comprising an opening exposing the bond pad;

a first insulation layer formed on the passivation layer, the first insulation layer comprising an opening exposing the bond pad; a redistribution layer electrically connected to the bond pad;

a solder ball attached to the redistribution layer directly above the bond pad and having sidewalls which conform only to the redistribution layer; and

a second insulation layer exposing the solder ball upward, wherein the second insulation layer is made of a non-photosensitive material.

17. The semiconductor device of claim 16 , wherein the first insulation layer is made of a photosensitive material.

18. The semiconductor device of claim 16 further comprising a redistribution seed layer between the redistribution layer and the bond pad.

19. A semiconductor device comprising:

a semiconductor die comprising:

a first surface;

a bond pad formed on the first surface; and

a passivation layer formed on the first surface, the passivation layer comprising an opening exposing the bond pad;

a first insulation layer formed on the passivation layer, the first insulation layer comprising an opening exposing the bond pad, the first insulation layer being made of a photosensitive material;

a redistribution layer having a first end electrically connected to the bond pad and a second end extended over the first surface of the semiconductor die;

a solder ball attached to the second end of the redistribution layer and having sidewalls which conform only to the redistribution layer; and

a second insulation layer exposing the solder ball upward, wherein the second insulation layer is made of a non-photosensitive material.

20. The semiconductor device of claim 19 wherein the second insulation layer is formed directly on the redistribution layer and the first insulation layer.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 9, 2020
From: AMKOR TECHNOLOGY, INC.
To: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE.LTD.
Reel/Frame 054067/0135 →
SECURITY INTEREST Recorded Aug 1, 2018
From: AMKOR TECHNOLOGY, INC.
To: BANK OF AMERICA, N.A., AS AGENT
Reel/Frame 046683/0139 →
PATENT SECURITY AGREEMENT Recorded May 7, 2015
From: AMKOR TECHNOLOGY, INC.
To: BANK OF AMERICA, N.A.
Reel/Frame 035613/0592 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2010
From: PAEK, JONG SIK; SOHN, EUN SOOK; PARK, IN BAE; DO, WON CHUL; RINNE, GLENN A.
To: AMKOR TECHNOLOGY, INC.
Reel/Frame 024111/0212 →