IP Library Granted Patent US 8,625,820
Granted Patent B2
US 8,625,820 · App. 12/742,665 · Granted Jan 7, 2014

Amplifier circuit audio circuit and electronic device

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Quick Facts
Patent No.
US 8,625,820
App. No.
12/742,665
Granted
Jan 7, 2014
Kind
B2
Abstract

An amplifier circuit which, includes a first input for receiving a first input signal and a second input for receiving a second input signal. A first amplifier section is connected to the first input and the second input is present. The first amplifier section can combine the first signal and the second signal into a first combined signal, the first amplifier being connected to a first output, for outputting the first combined signal. A second amplifier section is connected to the first input and the second input, for combining the first signal and the second signal into a second combined signal, the second amplifier being connected to a second output, for outputting the second combined signal. A common mode section is connected to the first input and the second input, for generating a common mode signal based on a combination of the first signal and the second signal and outputting the common mode signal at a common output connected to the common mode amplifier. The first combined signal, the second combined signal and the common mode signal satisfy the condition that combining the first combined signal and the common mode signal results in a signal with an amplitude proportional to the amplitude of the first input signal and combining the second combined signal and the common mode signal results in a signal with an amplitude proportional to the amplitude of the second input signal.

Claims (35)

1. An amplifier circuit, comprising:

a first input for receiving a first input signal;

a first amplifier connected to said first input for outputting a first amplified signal based upon the first input signal;

a second input for receiving a second input signal;

a second amplifier connected to said second input for outputting a second amplified signal based upon the second input signal;

a first combiner section connected to said first amplifier and said second amplifier, for combining said first amplified signal and said second amplified signal into a first combined signal, said first combiner section being connected to a first output, for outputting said first combined signal;

a second combiner section connected to said first amplifier and said second amplifier, for combining said first amplified signal and said second amplified signal into a second combined signal, said second combiner section being connected to a second output, for outputting said second combined signal; and

a common mode section connected to said first amplifier and said second amplifier, for generating a common mode signal based on a combination of said first amplified signal and said second amplified signal and outputting said common mode signal at a common output connected to said common mode section,

wherein the first combined signal, the second combined signal and the common mode signal satisfy the condition that combining the first combined signal and the common mode signal results in a third amplified signal with an amplitude proportional to the amplitude of the first input signal and combining the second combined signal and the common mode signal results in a fourth amplified signal with an amplitude proportional to the amplitude of the second input signal.

2. An amplifier circuit as claimed in claim 1 , wherein the first combined signal, the second combined signal and the common mode signal satisfy the condition that superimposing the first combined signal on the common mode signal or vice versa results in a signal with an amplitude proportional to the amplitude of the first input signal and superimposing the second combined signal on the common mode signal or vice versa results in a signal with an amplitude proportional to the amplitude of the second input signal.

3. An amplifier circuit as claimed in claim 1 , wherein at least one of said sections comprises:

a combining section connected to said first amplifier and to said second amplifier, for performing a superposition of said first input signal and said second input signal to obtain a combined signal.

4. An amplifier circuit as claimed in claim 1 , wherein:

said first output and said common output are connectable to a first transducer for converting said third amplified signal into a first acoustic signal and said second output and said common output are connectable to a second transducer for converting said fourth amplified signal into a second acoustic signal.

5. An amplifier circuit as claimed in claim 1 , wherein said first input signal and said second input signal are stereo audio signals.

6. An amplifier circuit as claimed in claim 1 , wherein at least one of said amplifiers includes a switched amplifier, wherein a switched amplifier includes a class D amplifier.

7. An amplifier circuit as claimed in claim 1 , wherein at least two of said first combiner section, said second combiner section and said common mode section are similar.

8. An amplifier circuit as claimed in claim 1 , including a first connector for connecting said first output and said common mode output of said amplifier circuit to a first load and a second connector for connecting said second output and said common mode output to a second load.

9. An amplifier circuit as claimed in claim 8 , wherein said first load and said second load are loudspeakers.

10. An amplifier circuit as claimed in claim 8 , including a multi-pole jack connector having at least three poles of which a first pair of poles forms said first connector and a second pair of poles forms said second connector.

11. An audio circuit for a set of at least two loudspeakers, comprising:

a signal processing unit having an input for receiving at least one audio signal, a first signal output for outputting a first processed audio signal and a second signal output for outputting a second processed audio signal; and

an amplifier circuit as claimed in claim 1 , with said first input of said amplifier circuit connected to said first signal output of said signal processing unit and with said second input of said amplifier circuit connected to said second signal output of said signal processing unit.

12. An electronic device including: a source of audio signals and an audio circuit as claimed in claim 11 .

13. An amplifier circuit as claimed in claim 2 , wherein at least one of said sections comprises:

a combining section connected to said first amplifier and to said second amplifier, for performing a superposition of said first input signal and said second input signal to obtain a combined signal.

14. An amplifier circuit as claimed in claim 2 , wherein:

said first output and said common output are connectable to a first transducer for converting said third amplified signal into a first acoustic signal and said second output and said common output are connectable to a second transducer for converting said fourth amplified signal into a second acoustic signal.

15. An amplifier circuit as claimed in claim 3 , wherein:

said first output and said common output are connectable to a first transducer for converting said third amplified signal into a first acoustic signal and said second output and said common output are connectable to a second transducer for converting said fourth amplified signal into a second acoustic signal.

16. An amplifier circuit as claimed in claim 2 , wherein said first input signal and said second input signal are stereo audio signals.

17. An amplifier circuit as claimed in claim 3 , wherein said first input signal and said second input signal are stereo audio signals.

18. An amplifier circuit as claimed in claim 4 , wherein said first input signal and said second input signal are stereo audio signals.

19. An amplifier circuit as claimed in claim 2 , wherein at least one of said amplifiers includes a switched amplifier.

20. An amplifier circuit as claimed in claim 3 , wherein at least one of said amplifiers includes a switched amplifier, wherein a switched a includes a class D amplifier.

Assignments (32)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0075 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0477 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2010
From: ODDOART, LUDOVIC; TRAUTH, GERHARD; CHARLET, JEAN-LUE
To: FREESCALE SEMICONDUCTOR INC.
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2010
From: ODDOART, LUDOVIC; TRAUTH, GERHARD; CHARLET, JEAN-LUC
To: FREESCALE SEMICONDUCTOR INC.
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