IP Library Granted Patent US 8,264,611
Granted Patent B2
US 8,264,611 · App. 12/748,391 · Granted Sep 11, 2012

System and method for video downscaling

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Quick Facts
Patent No.
US 8,264,611
App. No.
12/748,391
Granted
Sep 11, 2012
Kind
B2
Abstract

A system and method for downscaling signal data, where the system includes an antenna receiving video signal data; an analog-to-digital converter coupled to the antenna and converting the received analog signal data to digital signal data; a memory component storing video downscaling instructions; and a video downscaling processor, coupled to the memory component and the analog-to-digital converter, wherein the video downscaling processor, upon reading the video downscaling instructions from the memory component and executing the downscaling instructions: divides the digital video signal data into a plurality of blocks, wherein each block comprises a plurality of pixel elements; and cycles through the plurality of blocks, and for every block in the plurality of blocks, generates a new block, wherein the new block comprises a plurality of new pixels evenly spaced within the new block.

Claims (41)

1. A system for downscaling video signal data to an arbitrary size, said system comprising:

an antenna receiving video signal data;

an analog-to-digital converter coupled to said antenna and converting said received analog signal data to digital signal data;

a memory component storing video downscaling instructions; and

a video downscaling processor, coupled to said memory component and said analog-to-digital converter, wherein said video downscaling processor, upon reading said video downscaling instructions from said memory component and executing said downscaling instructions:

divides said digital video signal data into a plurality of blocks, wherein each block comprises a plurality of pixel elements; and

cycles through said plurality of blocks, and for every block in said plurality of blocks, generates a new block, wherein said new block comprises a plurality of new pixels evenly spaced within said new block,

wherein each said pixel element from said plurality of pixel elements comprises a pixel pair and each new pixel in said plurality of new pixels is generated from said pixel pair, and

wherein said new pixel is calculated as (1−d)*M 1 +d*M 2 , where M 1 is a first pixel of said pixel pair, M 2 is a second pixel of said pixel pair and d is a calculated distance from a start point of said pixel pair.

2. The system of claim 1 , wherein said plurality of blocks comprises a single horizontal line, as transmitted according to at least one of National Television System Committee (NTSC) standard of analog video signal data transmission, Phase Alternate Line (PAL) standard of analog video signal data transmission, and Sequential Color with Memory (SECAM) standard of video signal data transmission.

3. The system of claim 1 , wherein said calculated distance from said start point is a calculated distance from a first pixel of said pixel pair.

4. The system of claim 3 , wherein said calculated distance from said start point depends on a precalculated value r and said precalculated value r is calculated as q/p −1where q is a number of pixels in said block and p is a number of pixels in a new block.

5. The system of claim 4 , wherein said calculated distance from said start point depends on said precalculated value r as (d+r), where d is said calculated distance from said start point.

6. The system of claim 5 , wherein said video downscaling processor skips to another pixel pair when d>1, where d is said calculated distance from said start point.

7. The system of claim 1 , further comprising an anti-aliasing filter coupled to the downscaling processor, wherein said anti-aliasing filter filters said digital video signal data to produce filtered video signal data and remove an aliasing effect of said digital video signal, wherein the removal of said aliasing effect is a prerequisite for said downscaling.

8. The system of claim 7 , wherein said video downscaling processor is coupled to said anti-aliasing filter, and wherein upon reading said video downscaling instructions from said memory component and executing said downscaling instructions, said video downscaling processor downscales said filtered video signal data.

9. The system of claim 1 , wherein said video downscaling processor comprises a digital signal processor.

10. A system for downscaling video signal data to an arbitrary size, said system comprising:

an antenna receiving video signal data;

an analog-to-digital converter coupled to said antenna and converting said received analog signal data to digital signal data;

a memory component storing video downscaling instructions; and

a video downscaling processor, coupled to said memory component and said analog-to-digital converter, wherein said video downscaling processor, upon reading said video downscaling instructions from said memory and executing said downscaling instructions:

divides said digital video signal data into a plurality of blocks, wherein each block comprises a plurality of pixel elements; and

cycles through said plurality of blocks, and for every block in said plurality of blocks, generates a new block, wherein said new block comprises a plurality of new pixels evenly spaced within said new block,

wherein said plurality of blocks comprises a vertical block of horizontal lines as transmitted according to at least one of National Television System Committee (NTSC) standard of analog video signal data transmission, Phase Alternate Line (PAL) standard of analog video signal data transmission, and Sequential Color with Memory (SECAM) standard of video signal data transmission, and

wherein each said pixel element from said plurality of pixel elements comprises a horizontal line pair and each new pixel in said plurality of new pixels is generated from said horizontal line pair.

11. The system of claim 10 , wherein each new pixel in said plurality of new pixels is calculated as (1−d)*L 1 +d*L 2 , where L 1 is a first horizontal line of said horizontal line pair, L 2 is a second horizontal line of said horizontal line pair and d is a calculated distance from the first line of said horizontal pair.

12. The system of claim 10 , further comprising an anti-aliasing filter coupled to the downscaling processor, wherein said anti-aliasing filter filters said digital video signal data to produce filtered video signal data and remove an aliasing effect of said digital video signal, wherein the removal of said aliasing effect is a prerequisite for said downscaling.

13. The system of claim 12 , wherein said video downscaling processor is coupled to said anti-aliasing filter, and wherein upon reading said video downscaling instructions from said memory component and executing said downscaling instructions, said video downscaling processor downscales said filtered video signal data.

14. The system of claim 10 , wherein said video downscaling processor comprises a digital signal processor.

15. The method of claim 14 , wherein the removal of said aliasing effect permits the downscaling of said video signal data.

16. A method of downscaling video signal data to produce evenly spaced downscaled video signal data, said method comprising:

providing video signal data;

dividing said video signal data into a plurality of blocks, where each block comprises a plurality of pixel-block pairs;

cycling through said plurality of blocks, and for every block in said plurality of blocks, generates a new block, wherein said new block comprises a plurality of new pixel-block pairs spaced within said new block; and

calculating, for each pixel-block pair in said plurality of pixel-block pairs, a new pixel-block from said pixel-block pair,

wherein said new pixel-block is calculated as (1−d)*M 1 +d*M 2 , where M 1 is a first pixel-block of said pixel-block pair, M 2 is a second pixel-block of said pixel-block pair and d is a calculated distance from a start point of said pixel-block pair.

17. The method of claim 16 , wherein said calculated distance from said start point depends on a precalculated value r and said precalculated value r is calculated as q/p −1, where q is a number of lines in said block and p is a number of lines in a new block.

18. The method of claim 16 , wherein said plurality of blocks comprises a single horizontal line, as transmitted according to at least one of National Television System Committee (NTSC) standard of analog video signal data transmission, Phase Alternate Line (PAL) standard of analog video signal data transmission, and Sequential Color with Memory (SECAM) standard of analog video signal data transmission.

19. The method of claim 16 , wherein said plurality of blocks comprises a vertical block of horizontal lines as transmitted according to at least one of National Television System Committee (NTSC) standard of analog video signal data transmission, Phase Alternate Line (PAL) standard of analog video signal data transmission, and Sequential Color with Memory (SECAM) standard of analog video signal data transmission, and a pixel-block comprises a single horizontal line.

20. The method of claim 16 , further comprising filtering said digital video signal data to produce filtered video signal data and remove an aliasing effect of said digital video signal.

Assignments (23)
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: ATMEL CORPORATION
Reel/Frame 059262/0105 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: ATMEL CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041715/0747 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL Recorded Apr 6, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: ATMEL WIRELESS MCU TECHNOLOGIES CORPORATION
Reel/Frame 038364/0615 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL Recorded Apr 6, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NEWPORT MEDIA, INC.
Reel/Frame 038364/0659 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 24, 2014
From: NEWPORT MEDIA, INC.
To: ATMEL CORPORATION
Reel/Frame 034705/0090 →
TERMINATION OF SECURITY Recorded Oct 7, 2014
From: PINNACLE VENTURES, L.L.C.
To: ATMEL CORPORATION
Reel/Frame 033908/0435 →
TERMINATION OF SECURITY Recorded Oct 7, 2014
From: PINNACLE VENTURES, L.L.C.
To: ATMEL CORPORATION
Reel/Frame 033908/0379 →
TERMINATION OF SECURITY Recorded Oct 7, 2014
From: NEWPORT MEDIA, INC.
To: ATMEL CORPORATION
Reel/Frame 033908/0242 →
TERMINATION OF SECURITY Recorded Oct 7, 2014
From: NEWPORT MEDIA, INC.
To: ATMEL CORPORATION
Reel/Frame 033907/0775 →
TERMINATION OF SECURITY Recorded Oct 7, 2014
From: NEWPORT MEDIA, INC.
To: ATMEL CORPORATION
Reel/Frame 033907/0748 →
TERMINATION OF SECURITY Recorded Oct 7, 2014
From: HORIZON TECHNOLOGY FINANCE CORPORATION
To: ATMEL CORPORATION
Reel/Frame 033907/0702 →
TERMINATION OF SECURITY Recorded Oct 7, 2014
From: BRIDGE BANK, NATIONAL ASSOCIATION
To: ATMEL CORPORATION
Reel/Frame 033907/0517 →
PATENT SECURITY AGREEMENT Recorded Sep 5, 2014
From: NEWPORT MEDIA, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 033689/0195 →
PATENT SECURITY AGREEMENT Recorded Sep 5, 2014
From: ATMEL WIRELESS MCU TECHNOLOGIES CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 033689/0214 →
SECURITY AGREEMENT Recorded Mar 1, 2013
From: NEWPORT MEDIA, INC.
To: HORIZON TECHNOLOGY FINANCE CORPORATION, AS COLLATERAL AGENT
Reel/Frame 029956/0891 →
SECURITY AGREEMENT Recorded Feb 15, 2013
From: NEWPORT MEDIA, INC., A DELAWARE CORPORATION; NEWPORT MEDIA, INC., A CALIFORNIA CORPORATION
To: PINNACLE VENTURES, L.L.C.
Reel/Frame 029818/0138 →
SECURITY AGREEMENT Recorded Dec 31, 2012
From: NEWPORT MEDIA, INC.
To: BRIDGE BANK, NATIONAL ASSOCIATION
Reel/Frame 029554/0118 →
SECURITY AGREEMENT Recorded May 31, 2012
From: NEWPORT MEDIA, INC.
To: PINNACLE VENTURES, L.L.C.
Reel/Frame 028299/0903 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 27, 2010
From: ALI, MOHAMED ABD EL-SALAM; ELSHERIF, AHMED RAGAB; WASILY, NABIL YOUSEF
To: NEWPORT MEDIA, INC.
Reel/Frame 024148/0824 →