IP Library Granted Patent US 8,130,131
Granted Patent B2
US 8,130,131 · App. 12/763,439 · Granted Mar 6, 2012

Interpolating A/D converter

Assignee: Renesas Electronics Corporation
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Quick Facts
Patent No.
US 8,130,131
App. No.
12/763,439
Granted
Mar 6, 2012
Kind
B2
Abstract

Provided is an interpolating A/D converter including a reference voltage generation circuit, an analog signal input circuit, a preamplifier group including a plurality of preamplifiers, and an interpolation circuit including a plurality of resistors. Reference voltages from the reference voltage generation circuit and an analog signal from the analog signal input circuit are input to the preamplifier group. The interpolation circuit outputs an interpolation signal by interpolating output signals of the preamplifier group. The preamplifiers amplify a differential voltage when a differential voltage between the analog signal and the reference voltages is smaller than a specified value, and the current flow of which is stopped when it is larger than the specified value. The plurality of resistors are connected in series between the adjacent amplifiers.

Claims (19)

1. An interpolating A/D converter comprising:

an analog signal input circuit that receives an analog signal from outside;

a reference voltage generation circuit that includes a resistor ladder connected between a maximum reference voltage and a minimum reference voltage and generates reference voltages different from one another;

an amplifier group that receives the analog signal and the reference voltages, or a first input signal and a second input signal generated based on the analog signal and the reference voltages; and

an interpolation circuit that interpolates output signals from the amplifier group and outputs an interpolation signal, wherein

the amplifier group includes a plurality of amplifiers that amplify a differential voltage when a differential voltage between the analog signal and the reference voltages or between the first input signal and the second input signal is smaller than a specified value, and the current flow of which is stopped when the differential voltage is larger than the specified value, and

the interpolation circuit includes a plurality of resistors that are connected in series between the adjacent amplifiers.

2. The interpolating A/D converter according to claim 1 , wherein the amplifier group and the interpolation circuit are placed repeatedly in h (h is an integer of one or greater) number of stages.

3. The interpolating A/D converter according to claim 2 , wherein the analog signal and the reference voltages different from one another are input to the plurality of amplifiers in the amplifier group in a first stage.

4. The interpolating A/D converter according to claim 2 , wherein

the first input signal input to the amplifier group in an i-th (i is an integer of two or greater) stage is a signal output from the amplifier group in an (i−1)th stage, and

the second input signal is the interpolation signal output from the interpolation circuit in the (i−1)th stage.

5. The interpolating A/D converter according to claim 4 , wherein the amplifier group in the i-th stage starts an amplification with a delay from the amplifier group in the (i−1)th stage.

6. The interpolating A/D converter according to claim 1 , wherein the current flow of the amplifiers is stopped by performing a latch operation.

7. The interpolating A/D converter according to claim 6 , wherein

each amplifier includes a latch circuit made up of a first transistor and a second transistor of a first channel type, and a third transistor and a fourth transistor of a second channel type,

a drain of the first transistor and a drain of the third transistor are connected to each other, and

a drain of the second transistor and a drain of the fourth transistor are connected to each other.

8. The interpolating A/D converter according to claim 7 , wherein the first to fourth transistors are MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistors).

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Oct 26, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025191/0985 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2010
From: NAKAJIMA, YUJI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024258/0884 →
Priority Claims (1)
JP 2009-103982 · Apr 22, 2009 · national
Continuity (1)
Related Publication 20100271249A1 · Oct 28, 2010