Field-effect transistor
A field-effect transistor according to the present invention includes a silicon substrate that has a resistivity of not more than 0.02 Ω·cm, a channel layer that is formed on the silicon substrate and has a thickness of at least 5 μm, a barrier layer that is formed on the channel layer and supplies the channel layer with electrons, a two dimensional electron gas layer that is formed by a hetero junction between the channel layer and the barrier layer, a source electrode and a drain electrode that each form an ohmic contact with the barrier layer, and a gate electrode that is formed between the source electrode and the drain electrode, and forms a Schottky barrier junction with the barrier layer.
1. A field-effect transistor comprising:
a silicon substrate that has a resistivity smaller than 0.02 Ω·cm;
a channel layer that is formed on the silicon substrate and has a thickness of at least 5 μm;
a barrier layer that is formed on the channel layer and supplies the channel layer with electrons;
a two dimensional electron gas layer that is formed by a hetero junction between the channel layer and the barrier layer;
a source electrode and a drain electrode that each form an ohmic contact with the barrier layer; and
a gate electrode that is formed between the source electrode and the drain electrode, and forms a Schottky barrier junction with the barrier layer.
2. The field-effect transistor according to claim 1 , wherein the resistivity of the silicon substrate is at least 0.001 Ω·cm and smaller than 0.02 Ω·cm.
3. The field-effect transistor according to claim 1 , wherein the thickness of the channel layer is at least 5 μm and not more than 10 μm.
4. The field-effect transistor according to claim 1 , wherein the channel layer is formed by i-GaN, and the barrier layer is formed by i-Al x Ga 1-x N (x=0.1 to 0.3).