Semiconductor devices having gates including oxidized nickel
View Patent ↗Schottky barrier semiconductor devices are provided including a wide bandgap semiconductor layer and a gate on the wide bandgap semiconductor layer. The gate includes a metal layer on the wide bandgap semiconductor layer including a nickel oxide (NiO) layer. Related methods of fabricating devices are also provided herein.
1. A Schottky barrier semiconductor device comprising: a wide bandgap semiconductor layer; a gate on the wide bandgap semiconductor layer, the gate comprising a metal layer directly on the wide bandgap semiconductor layer, the metal layer including a nickel oxide (NiO) layer; and a layer of Nickel between the wide bandgap semiconductor layer and the NiO layer such that the wide bandgap layer does not contact the NiO layer.
2. The device of claim 1 , wherein the gate further comprises:
a diffusion barrier layer on the NiO metal layer; and
a current spreading layer on the diffusion barrier layer.
3. The device of claim 2 , wherein the diffusion barrier layer comprises a multilayer diffusion barrier layer and wherein the multilayer diffusion barrier layer comprises at least two layers including platinum, molybdenum, tungsten, chromium, and/or tantalum.
4. The device of claim 2 , wherein the wide bandgap semiconductor layer comprises gallium nitride (GaN) and/or silicon carbide (SiC), wherein the current spreading layer comprises gold and/or copper, and wherein the diffusion barrier layer comprises a multilayer diffusion barrier layer and wherein the multilayer diffusion barrier layer comprises at least two layers including platinum, molybdenum, tungsten, chromium, and/or tantalum.
5. The device of claim 2 , further comprising source and drain regions, a respective one of which is adjacent an opposing end of the metal layer and configured to provide a high electron mobility transistor (HEMT) or a metal semiconductor field effect transistor (MESFET).
6. The device of claim 2 , wherein the wide bandgap semiconductor layer comprises gallium nitride (GaN), wherein the diffusion barrier layer comprises platinum (Pt) and wherein the current spreading layer comprises gold (Au).
7. The device of claim 6 , wherein the Pt diffusion barrier layer has a thickness of from about 100 to about 200 Å and wherein the Au current spreading layer has a thickness of from about 3000 Å to about 1.0 μm.
8. The device of claim 6 , wherein the NiO layer is directly on the layer of Nickel.
9. The device of claim 8 , wherein the Pt diffusion layer is directly on the NiO layer and the Au current spreading layer is directly on the Pt diffusion layer.
10. The device of claim 1 , wherein the NiO layer has a thickness of from about 50 to about 300 Å.
11. The device of claim 1 , wherein the NiO layer has a thickness of from about 50 to about 300 Å and wherein the layer of Nickel has a thickness of about 300 Å.
12. A Schottky barrier semiconductor device comprising:
a first layer comprising gallium nitride;
a second layer comprising nickel oxide on the first layer;
a third layer comprising tantalum on the second layer, remote from the first layer;
a fourth layer comprising platinum on the third layer, remote from the second layer; and
a layer of Nickel between the first and second layers such that the gallium nitride layer does not contact the nickel oxide layer.
13. The device of claim 12 , wherein the second layer is directly on the layer of Nickel, the third layer is directly on the second layer and the fourth layer is directly on the third layer.
14. The device of claim 12 , further comprising source and drain regions, a respective one of which is adjacent an opposing end of the second layer and configured to provide a high electron mobility transistor (HEMT) or a metal semiconductor field effect transistor (MESFET).