IP Library Granted Patent US 8,283,223
Granted Patent B2
US 8,283,223 · App. 12/789,558 · Granted Oct 9, 2012

Method of manufacturing semiconductor device and semiconductor device

Assignee: Renesas Electronics Corporation
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Quick Facts
Patent No.
US 8,283,223
App. No.
12/789,558
Granted
Oct 9, 2012
Kind
B2
Abstract

A method of manufacturing a semiconductor device includes: forming a gate insulating film over a semiconductor substrate; forming a mask that has an opening at a position corresponding to the gate insulating film formed in an NMOSFET forming region and covers the gate insulating film; forming a first metal layer over the gate insulating film disposed in the NMOSFET forming region and the mask formed in a PMOSFET forming region; and performing a heat treatment to thermally diffuse a metal material forming the first metal layer into the gate insulating film formed in the NMOSFET forming region.

Claims (54)

1. A method of manufacturing a semiconductor device including a first-conduction-type MOSFET and a second-conduction-type MOSFET over a semiconductor substrate, comprising:

forming a gate insulating film in a first-conduction-type MOSFET forming region and a second-conduction-type MOSFET forming region of said semiconductor substrate;

forming a hard mask that has an opening at a position corresponding to said gate insulating film formed in said first-conduction-type MOSFET forming region and covers said gate insulating film formed in said second-conduction-type MOSFET forming region;

forming a first metal layer over said gate insulating film disposed in said first-conduction-type MOSFET forming region and said hard mask formed in said second-conduction-type MOSFET forming region;

performing a heat treatment to thermally diffuse a metal material forming said first metal layer into said gate insulating film formed in said first-conduction-type MOSFET forming region;

removing said remaining first metal layer from said first-conduction-type MOSFET forming region and said second-conduction-type MOSFET forming region;

removing said hard mask from said second-conduction-type MOSFET forming region;

forming a second metal layer that is made of a metal material different from that forming said first metal layer over said gate insulating film in said first-conduction-type MOSFET forming region and said second-conduction-type MOSFET forming region of said semiconductor substrate, said second metal layer being part of gate electrodes of said first-conduction-type MOSFET and said second-conduction-type MOSFET; and

forming a silicon layer over said second metal layer, said silicon layer being part of said gate electrodes of said first-conduction-type MOSFET and said second-conduction-type MOSFET,

wherein said forming said gate insulating film includes:

forming a first insulating film; and

forming a second insulating film with a dielectric constant greater than that of said first insulating film,

wherein said forming said hard mask includes:

forming a film that is made of the same material as that forming said hard mask over the entire surface of said gate insulating film in said first-conduction-type MOSFET forming region and said second-conduction-type MOSFET forming region;

forming a resist so as to cover the entire surface of said film;

forming an opening in said resist in said first-conduction-type MOSFET forming region to expose said film;

removing said film exposed from said opening of said resist to expose said gate insulating film in said first-conduction-type MOSFET forming region; and

removing said resist using a wet process.

2. The method of manufacturing a semiconductor device according to claim 1 ,

wherein said mask is made of at least one selected from a group including SiO 2 , a silicon nitride film, and amorphous carbon.

3. The method of manufacturing a semiconductor device according to claim 1 , further comprising:

forming a silicon oxynitride film in said first-conduction-type MOSFET forming region and said second-conduction-type MOSFET forming region of said semiconductor substrate before said forming said gate insulating film.

4. The method of manufacturing a semiconductor device according to claim 1 ,

wherein said first-conduction-type MOSFET is an NMOSFET,

said second-conduction-type MOSFET is a PMOSFET, and

said first metal film is made of at least one selected from a group including La, Dy, La 2 O 3 , and Dy 2 O 3 .

5. The method of manufacturing a semiconductor device according to claim 1 ,

wherein said gate insulating film is made of HfO 2 or ZrO 2 .

6. The method of manufacturing a semiconductor device according to claim 1 ,

wherein said second metal layer is made of at least one selected from a group including TiN, W, TaN, TaSiN, Ru, TiAl, and Al.

7. A method of manufacturing a semiconductor device including a first-conduction-type MOSFET and a second-conduction-type MOSFET over a semiconductor substrate, comprising:

forming a gate insulating film in a first-conduction-type MOSFET forming region and a second-conduction-type MOSFET forming region of said semiconductor substrate;

forming a hard mask that has an opening at a position corresponding to said gate insulating film formed in said first-conduction-type MOSFET forming region and covers said gate insulating film formed in said second-conduction-type MOSFET forming region;

forming a first metal layer over said gate insulating film disposed in said first-conduction-type MOSFET forming region and said hard mask formed in said second-conduction-type MOSFET forming region;

performing a heat treatment to thermally diffuse a metal material forming said first metal layer into said gate insulating film formed in said first-conduction-type MOSFET forming region;

removing a remainder of said first metal layer from said first-conduction-type MOSFET forming region and said second-conduction-type MOSFET forming region;

removing said hard mask from said second-conduction-type MOSFET forming region;

forming a second metal layer that is made of a metal material different from that forming said first metal layer over said gate insulating film in said first-conduction-type MOSFET forming region and said second-conduction-type MOSFET forming region of said semiconductor substrate, said second metal layer being part of gate electrodes of said first-conduction-type MOSFET and said second-conduction-type MOSFET, wherein said second metal layer is made of at least one metal selected from a group including TiN, W, TaN, TaSiN, Ru, TiAl, and Al; and

forming a silicon layer over said second metal layer, said silicon layer being part of said gate electrodes of said first-conduction-type MOSFET and said second-conduction-type MOSFET,

wherein said forming said gate insulating film includes:

forming a first insulating film; and

forming a second insulating film with a dielectric constant greater than that of said first insulating film,

wherein said forming said hard mask includes:

forming a film that is made of the same material as that forming said hard mask over the entire surface of said gate insulating film in said first-conduction-type MOSFET forming region and said second-conduction-type MOSFET forming region;

forming a resist so as to cover the entire surface of said film;

forming an opening in said resist in said first-conduction-type MOSFET forming region to expose said film;

removing said film exposed from said opening of said resist to expose said gate insulating film in said first-conduction-type MOSFET forming region; and

removing said resist using a wet process.

8. The method of manufacturing a semiconductor device according to claim 7 ,

wherein said first-conduction-type MOSFET is an NMOSFET,

said second-conduction-type MOSFET is a PMOSFET, and

said first metal film is made of at least one selected from a group including La, Dy, La 2 O 3 , and Dy 2 O 3 .

9. The method of manufacturing a semiconductor device according to claim 7 ,

wherein said gate insulating film is made of HfO 2 or ZrO 2 .

Assignments (2)
CHANGE OF NAME Recorded Oct 26, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025191/0985 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2010
From: IWAMOTO, TOSHIYUKI
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024628/0916 →
Priority Claims (1)
JP 2009-150113 · Jun 24, 2009 · national
Continuity (1)
Related Publication 20100327365A1 · Dec 30, 2010