IP Library Granted Patent US 9,035,474
Granted Patent B2
US 9,035,474 · App. 12/793,515 · Granted May 19, 2015

Method for manufacturing a semiconductor substrate

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Quick Facts
Patent No.
US 9,035,474
App. No.
12/793,515
Granted
May 19, 2015
Kind
B2
Abstract

The invention relates to a method for manufacturing a semiconductor substrate, in particular, a semiconductor-on-insulator substrate by providing a donor substrate and a handle substrate, forming a pattern of one or more doped regions typically inside the handle substrate, and then attaching such as by molecular bonding the donor substrate and the handle substrate to obtain a donor-handle compound.

Claims (26)

1. A method for manufacturing a semiconductor substrate, comprising:

providing a donor substrate and a semiconductor handle substrate;

implanting ions into the semiconductor handle substrate and forming one or more alignment marks buried completely inside the semiconductor handle substrate by the implantation of the ions, the one or more alignment marks being configured to be detectable using electromagnetic radiation in the infrared region of the electromagnetic spectrum;

forming a plurality of doped regions buried completely inside the semiconductor handle substrate, each doped region of the plurality of doped regions comprising one or more dopants; and

attaching the donor substrate and the semiconductor handle substrate together by molecular bonding to obtain a donor-handle combination, at least one of the donor substrate and the handle substrate including a surface layer of an insulator such that the donor-handle combination forms a semiconductor-on-insulator semiconductor substrate.

2. The method of claim 1 , wherein the implanted ions used in the formation of the one or more alignment marks comprise one or more non-dopant species.

3. The method of claim 2 , wherein the one or more non-dopant species comprise H, He, Ar, F, Ne, Xe or a combination thereof.

4. The method of claim 1 , further comprising thermal annealing of the donor-handle combination.

5. The method of claim 1 , wherein forming the plurality of doped regions buried completely inside the semiconductor handle substrate comprises at least one ion implantation step for implanting the one or more dopants.

6. The method of claim 5 , wherein the one or more dopants comprise phosphorus, arsenic, boron or a combination thereof.

7. The method of claim 5 , wherein the at least one ion implantation step is followed by an annealing step.

8. The method of claim 1 , further comprising forming a screening layer by applying a screening oxide on the semiconductor handle substrate prior to forming the plurality of doped regions.

9. The method of claim 1 , further comprising, prior to attaching the donor substrate and the semiconductor handle substrate together, forming a predetermined splitting area at a depth inside the donor substrate and detaching a remainder of the donor substrate from the donor-handle combination at the predetermined splitting area after attaching the donor substrate and the semiconductor handle substrate together.

10. The method of claim 1 , further comprising forming at least one dielectric layer on the donor substrate prior to the attaching the donor substrate and the semiconductor handle substrate together.

11. The method of claim 10 , wherein the at least one dielectric layer comprises an oxide and has a thickness of less than 100 nm.

12. The method of claim 1 , wherein the one or more doped regions comprises one or more doped line regions or one or more doped island regions.

13. The method of claim 1 , wherein the one or more doped regions comprises at least one well region and at least one back gate, and wherein both the at least one well region and at least one back gate are formed using the same mask.

14. A method for manufacturing a semiconductor substrate, comprising:

providing a donor substrate and a handle substrate;

implanting ions into the handle substrate and forming one or more alignment marks buried completely inside the handle substrate by the implantation of the ions so that the top surface of the handle substrate remains planar, the one or more alignment marks being configured to be detectable using electromagnetic radiation in the infrared region of the electromagnetic spectrum; and

attaching the donor substrate and the handle substrate together to obtain a semiconductor substrate including a donor-handle combination.

15. A semiconductor-on-insulator substrate, comprising:

a semiconductor substrate layer having a planar top surface; and

a semiconductor layer molecularly bonded to the planar top surface of the semiconductor substrate layer with a dielectric layer therebetween;

one or more alignment marks buried completely inside the semiconductor substrate layer and comprising one or more implanted non-dopant species, the one or more alignment marks configured to be detectable using electromagnetic radiation in the infrared region of the electromagnetic spectrum; and

a plurality of doped regions buried inside the semiconductor substrate layer, each doped region of the plurality of doped regions comprising one or more dopants.

Assignments (2)
CHANGE OF NAME Recorded Mar 4, 2012
From: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES
To: SOITEC
Reel/Frame 027800/0911 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TYPOGRAPHICAL ERROR IN APPLICATION NO. FROM '11/793,515' TO READ --12/793,515-- PREVIOUSLY RECORDED ON REEL 024781 FRAME 0403. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNNOR'S INTEREST. Recorded Aug 5, 2010
From: MAZURE, CARLOS; FERRANT, RICHARD; BOURDELLE, KONSTANTIN; NGUYEN, BICH-YEN
To: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES
Reel/Frame 024796/0570 →