PROBE CARD AND TEST EQUIPMENT
Provided are a probe card including a first area group including a plurality of first areas, each including a plurality of probes for input pad and probes for output pad, the first areas being aligned in L rows by M columns (L, M: natural number); and a second area group including a plurality of second areas, each including a plurality of probes for input pad, the second areas being aligned in (L×N) rows by M columns (N: natural number); and the first area group and the second area group are continuously connected in a column direction according to the chip alignment, such that the first areas and the second areas are aligned in {L+(L×N)} rows by M columns.
1 . A probe card comprising:
a first area group including a plurality of first areas, each including a plurality of probes for input pad and probes for output pad located so as to correspond to input pads and output pads of one of a plurality of chips on a wafer to be tested, said first areas being aligned in L rows by M columns (L, M: natural number) according to an alignment of said chips on said wafer to be tested; and
a second area group including a plurality of second areas, each including a plurality of probes for input pad located so as to correspond to input pads of one of said chips on said wafer to be tested, said second areas being aligned in (L×N) rows by M columns (N: natural number) or in L rows by (M×N) columns according to said alignment of said chips on said wafer to be tested;
wherein in the case where said second area group includes (L×N) rows and M columns,
said first area group and said second area group are continuously connected in a column direction according to said alignment of said chips, such that said first areas and said second areas are aligned in {L+(L×N)} rows by M columns; and
in the case where said second area group includes L rows and (M×N) columns,
said first area group and said second area group are continuously connected in a row direction according to said alignment of said chips, such that said first areas and said second areas are aligned in L rows by {M+(M×N)} columns.
2 . The probe card according to claim 1 ,
wherein a relationship expressed as C o ×L×M≦T o and C i ×L×N×M≦T i is satisfied,
in which C o (natural number) denotes a quantity of output pads per chip on said wafer to be tested and C i (natural number) a quantity of input pads thereof, and
T o (natural number) a quantity of output terminals of a tester connected to the respective chips on said wafer to be tested and T i (natural number) a quantity of input terminals thereof.
3 . The probe card according to claim 1 , wherein said chip is an LCD driver.
4 . A test equipment comprising said probe card according to claim 1 and a tester connected to said chips on said wafer through said probe card.