IP Library Granted Patent US 8,850,089
Granted Patent B1
US 8,850,089 · App. 12/818,767 · Granted Sep 30, 2014

Method and apparatus for unified final buffer with pointer-based and page-based scheme for traffic optimization

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Quick Facts
Patent No.
US 8,850,089
App. No.
12/818,767
Granted
Sep 30, 2014
Kind
B1
Abstract

A method and apparatus for unified final buffer with pointer-based and page-based scheme for traffic optimization have been disclosed.

Claims (29)

1. A method comprising:

configuring a same memory for operation at a same time as both a page based scheme and a pointer based scheme for one or more egress final buffers, and wherein said page based scheme uses a memory's page pointer to store a VCO packet based on said VCO packet's priority level, such that arrived lower priority packets do not block later arrived higher priority packets, and wherein the pointer based scheme stores a VC1/VC5 packet, and wherein all available memory page pointers are stored in a free buffer list;

transmitting a packet from said one or more egress final buffers, wherein said transmitted packet has associated with it an index denoted transmitted packet index;

using said transmitted packet index to store in a Packet Retransmission Mapper a Transfer Mode associated with said transmitted packet, a Memory Page Pointer, a VOQ Index, and a VOQ Read Pointer, wherein said Transfer Mode is selected from the group consisting of RT, and CT; and

using said transmitted packet index to store in a Dword Count Mapper a count of dwords transmitted for one or more VC1/VC5 packets.

2. A method comprising:

configuring a same memory for operation at a same time as both a page based scheme and a pointer based scheme for one or more egress final buffers, and wherein said page based scheme uses a memory's page pointer to store a VCO packet based on said VCO packet's priority level, such that arrived lower priority packets do not block later arrived higher priority packets, and wherein the pointer based scheme stores a VC1/VC5 packet, and wherein all available memory page pointers are stored in a free buffer list;

transmitting a packet from said one or more egress final buffers, wherein said transmitted packet has associated with it an index denoted transmitted packet index;

using said transmitted packet index to store in a Packet Retransmission Mapper a Transfer Mode associated with said transmitted packet, a Memory Page Pointer, a VOQ Index, and a VOQ Read Pointer, wherein said Transfer Mode is selected from the group consisting of RT, and CT;

receiving from a Link Partner an ACK and a returned packet index;

using said returned packet index to look up in said Packet Retransmission Mapper a Memory Page Pointer associated with said returned packet index; and

releasing memory pointed to by said Memory Page Pointer associated with said returned packet index.

3. The method of claim 2 wherein said released memory is only for VC0 packets.

4. The method of claim 1 further comprising:

receiving from a Link Partner an ACK and a returned packet index;

using said returned packet index to retrieve from said Dword Count Mapper a stored dword count associated with said returned packet index; and

releasing memory associated with said stored dword count associated with said returned packet index.

5. The method of claim 4 wherein said released memory is only for VC1/VC5 packets.

6. A method comprising:

configuring a same memory for operation at a same time as both a page based scheme and a pointer based scheme for one or more egress final buffers, and wherein said page based scheme uses a memory's page pointer to store a VCO packet based on said VCO packet's priority level, such that arrived lower priority packets do not block later arrived higher priority packets, and wherein the pointer based scheme stores a VC1/VC5 packet, and wherein all available memory page pointers are stored in a free buffer list;

transmitting a packet from said one or more egress final buffers, wherein said transmitted packet has associated with it an index denoted transmitted packet index;

using said transmitted packet index to store in a Packet Retransmission Mapper a Transfer Mode associated with said transmitted packet, a Memory Page Pointer, a VOQ Index, and a VOQ Read Pointer, wherein said Transfer Mode is selected from the group consisting of RT, and CT;

receiving from a Link Partner a NACK and a returned packet index;

when said retransmission is for an RT Transfer Mode then:

using said returned packet index to look up and retrieve from said Packet Retransmission Mapper all packets' VOQ Index and VOQ Read Pointer from said returned packet index up to and including a transmitted packet index; and

realigning a VOQ entry used to store a packet pointer for retransmitting all packets associated with said returned packet index up to and including said transmitted packet index;

when said retransmission is for a CT Transfer Mode then:

using said returned packet index to look up and retrieve from said Dword Count Mapper all packets' dword count from said returned packet index up to and including a transmitted packet index; and

releasing memory associated with said stored dword count associated with said returned packet index up to and including said transmitted packet index.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2025
From: RENESAS ELECTRONICS AMERICA INC.
To: AXIRO SEMICONDUCTOR INC.
Reel/Frame 070864/0142 →
MERGER Recorded Apr 15, 2025
From: INTEGRATED DEVICE TECHNOLOGY, INC.
To: RENESAS ELECTRONICS AMERICA INC.
Reel/Frame 070851/0391 →
RELEASE OF SECURITY INTEREST Recorded Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION; MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 048746/0001 →
SECURITY AGREEMENT Recorded Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION; CHIPX, INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 18, 2010
From: WANG, CHI-LIE; MO, JASON Z
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 024560/0812 →