Integrated circuit module and method of packaging same
View Patent ↗An integrated circuit (IC) module ( 20 ) includes a ground plane ( 22 ) having adjoining cutouts ( 30, 32 ). The cutout ( 32 ) defines a critical signal pathway ( 38 ). A device ( 24 ) is positioned in the cutout ( 30 ) and a device ( 26 ) is positioned outside of the cutout ( 30 ) adjacent to the cutout ( 32 ). An electrical interconnect ( 56 ) positioned in the critical signal pathway ( 38 ) interconnects the device ( 24 ) with the device ( 26 ). A method ( 60 ) of packaging the IC module ( 20 ) entails encapsulating the ground plane ( 22 ) and devices ( 24, 26 ) in a packaging material, and forming conductive vias ( 92 ) in the packaging material ( 84 ) that extend between the ground plane ( 22 ) and an exterior surface ( 94 ) of the packaging material ( 84 ). The conductive vias ( 92 ) surround the device ( 24 ) and cutout ( 32 ) to protect again electromagnetic interference and to provide guided signal pathways for high frequency signals on electrical interconnect ( 56 ).
1. A method of making an integrated circuit (IC) module comprising:
attaching an outer surface of a ground plane to a process carrier, said ground plane having a first cutout and a second cutout, each of said first and second cutouts extending through said ground plane, said second cutout having a first end and a second end, said first end adjoining said first cutout, and said second cutout forming a critical signal pathway;
coupling a first surface of a first device to said process carrier, said first device being positioned in said first cutout;
fastening a second surface of a second device to said process carrier, said second device being positioned outside of said first cutout and adjacent to said second end of said second cutout;
encapsulating said ground plane, said first device, and said second device in a packaging material, such that said outer surface, said first surface, and said second surface are exposed out of said packaging material; and
forming an electrical interconnect positioned in said critical signal pathway to produce said IC module, said electrical interconnect interconnecting said first device with said second device.
2. A method as claimed in claim 1 further comprising forming a metallization layer overlying at least a portion of said outer surface of said ground plane to include a passage region at which said metallization layer is absent, said passage region being in stacked alignment with said second cutout, wherein together said second cutout and said passage region define said critical signal pathway.
3. A method as claimed in claim 2 further comprising removing said process carrier to expose said outer surface, said first surface, and said second surface, said metallization layer being formed following removal of said process carrier.
4. A method as claimed in claim 2 wherein said metallization layer and said electrical interconnect are formed concurrently.
5. A method as claimed in claim 2 wherein said metallization layer and said electrical interconnect are formed on a coincident plane.
6. A method as claimed in claim 2 further comprising:
forming a dielectric layer interposed between said outer surface of said ground plane and said metallization layer; and
forming conductive vias aligned on opposing longitudinal sides of said second cutout, said conductive vias extending between said ground plane and said metallization layer through said dielectric layer.
7. A method as claimed in claim 1 further comprising forming conductive vias in said packaging material surrounding at least one of said first cutout and said second cutout, said conductive vias extending between said ground plane and an exterior surface of said packaging material.
8. A method as claimed in claim 7 further comprising forming a metallization layer on said exterior surface of said packaging material and in electrical communication with said conductive vias.
9. A method as claimed in claim 7 wherein said first device is a millimeter-wave device positioned in said first cutout, said electrical interconnect is a critical signal trace adapted to carry a millimeter-wave signal between said millimeter-wave device and said second device, and said forming said conductive vias forms said vias to surround at least one of said millimeter-wave device and said critical signal trace.
10. A method as claimed in claim 1 wherein said ground plane includes a third cutout extending through said ground plane, said second end of said second cutout adjoins said third cutout, and said method further comprises positioning said second device in said third cutout.
11. A method as claimed in claim 10 further comprising forming conductive vias in said packaging material surrounding said third cutout, said conductive vias extending between said ground plane and an exterior surface of said packaging material.
12. A method as claimed in claim 1 further comprising removing said process carrier to expose said outer surface, said first surface, and said second surface, said electrical interconnect being formed following removal of said process carrier.
13. A method as claimed in claim 1 wherein said forming said electrical interconnect comprises interconnecting a first conductive pad on said first surface of said first device with a second conductive pad on said second surface of said second device.
14. A method of making an integrated circuit (IC) module comprising:
attaching an outer surface of a ground plane to a process carrier, said ground plane having a first cutout and a second cutout, each of said first and second cutouts extending through said ground plane, said second cutout having a first end and a second end, said first end adjoining said first cutout;
coupling a first surface of a first device to said process carrier, said first device being positioned in said first cutout;
fastening a second surface of a second device to said process carrier, said second device being positioned outside of said first cutout and adjacent to said second end of said second cutout;
encapsulating said ground plane, said first device, and said second device in a packaging material, such that said outer surface, said first surface, and said second surface are exposed out of said packaging material;
forming conductive vias in said packaging material surrounding at least one of said first cutout and said second cutout, said conductive vias extending between said ground plane and an exterior surface of said packaging material;
forming a metallization layer overlying at least a portion of said outer surface of said ground plane to include a passage region at which said metallization layer is absent, said passage region being in stacked alignment with said second cutout, wherein together said second cutout and said passage region define a critical signal pathway; and
forming an electrical interconnect positioned in said critical signal pathway to produce said IC module, said electrical interconnect interconnecting said first device with said second device.
15. A method as claimed in claim 14 wherein said metallization layer is a first metallization layer, and said method further comprises forming a second metallization layer on said exterior surface of said packaging material and in electrical communication with said conductive vias such that said ground plane, said first device, and said second device are interposed between said first and second metallization layers.
16. A method as claimed in claim 14 wherein said first device is a millimeter-wave device positioned in said first cutout, said electrical interconnect is a critical signal trace adapted to carry a millimeter-wave signal between said millimeter-wave device and said second device, and said forming said conductive vias forms said vias to surround at least one of said millimeter-wave device and said critical signal trace.
17. A method as claimed in claim 14 wherein said ground plane includes a third cutout extending through said ground plane, said second end of said second cutout adjoining said third cutout, and said method further comprises positioning said second device in said third cutout, and said forming said conductive vias forms said vias to additionally surround said second device.
18. A method of making an integrated circuit (IC) module comprising:
attaching an outer surface of a ground plane to a process carrier, said ground plane having a first cutout and a second cutout, each of said first and second cutouts extending through said ground plane, said second cutout having a first end and a second end, said first end adjoining said first cutout;
coupling a first surface of a first device to said process carrier, said first device being positioned in said first cutout;
fastening a second surface of a second device to said process carrier, said second device being positioned outside of said first cutout and adjacent to said second end of said second cutout;
encapsulating said ground plane, said first device, and said second device in a packaging material, such that said outer surface, said first surface, and said second surface are exposed out of said packaging material;
forming a first metallization layer on said exterior surface of said packaging material;
forming a second metallization layer overlying at least a portion of said outer surface of said ground plane such that said ground plane, said first device, and said second device are interposed between said first and second metallization layers, said second metallization layer including a passage region at which said second metallization layer is absent, said passage region being in stacked alignment with said second cutout, wherein together said second cutout and said passage region define a critical signal pathway; and
forming an electrical interconnect positioned in said critical signal pathway to produce said IC module, said electrical interconnect interconnecting said first device with said second device.
19. A method as claimed in claim 18 further comprising:
forming a dielectric layer interposed between said outer surface of said ground plane and said second metallization layer; and
forming conductive vias aligned on opposing longitudinal sides of said second cutout, said conductive vias extending between said ground plane and said second metallization layer through said dielectric layer.
20. A method as claimed in claim 19 wherein said conductive vias are first conductive vias, and said method further comprises forming second conductive vias in said packaging material surrounding at least one of said first cutout and said second cutout, said second conductive vias extending between said ground plane and said first metallization layer.