IP Library Granted Patent US 8,198,672
Granted Patent B2
US 8,198,672 · App. 12/827,577 · Granted Jun 12, 2012

Ultrahigh density vertical NAND memory device

Assignee: SanDisk Technologies, Inc.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,198,672
App. No.
12/827,577
Granted
Jun 12, 2012
Kind
B2
Abstract

Monolithic, three dimensional NAND strings include a semiconductor channel, at least one end portion of the semiconductor channel extending substantially perpendicular to a major surface of a substrate, a plurality of control gate electrodes having a strip shape extending substantially parallel to the major surface of the substrate, the blocking dielectric comprising a plurality of blocking dielectric segments, a plurality of discrete charge storage segments, and a tunnel dielectric located between each one of the plurality of the discrete charge storage segments and the semiconductor channel.

Claims (15)

1. A monolithic three dimensional NAND string, comprising:

a semiconductor channel located over a substrate, the semiconductor channel having a U-shaped side cross section, wherein two wing portions of the U-shaped semiconductor channel which extend substantially perpendicular to a major surface of the substrate are connected by a connecting portion which extends substantially parallel to the major surface of the substrate;

an insulating fill located over the connecting portion and separating two wing portions of the U-shaped semiconductor channel;

a plurality control gate electrodes having a strip shape extending substantially parallel to the major surface of the substrate, wherein the plurality of control gate electrodes comprise at least a first control gate electrode located in a first device level and a second control gate electrode located in a second device level located over the substrate and below the first device level;

a plurality of blocking dielectric segments, wherein each of the plurality of blocking dielectric segments is located in contact with a respective one of the plurality of control gate electrodes;

a plurality of discrete charge storage segments; and

a tunneling dielectric located between the plurality of discrete charge storage segments and the semiconductor channel.

2. The monolithic three dimensional NAND string of claim 1 , wherein at least a portion of each of the plurality of blocking dielectric segments has a clam shape and wherein each of the plurality of discrete charge storage segments is located at least partially in an opening of a respective clam-shaped blocking dielectric segment.

3. The monolithic three dimensional NAND string of claim 1 , wherein the plurality of discrete charge storage segments comprise a plurality of floating gates.

4. The monolithic three dimensional NAND string of claim 1 , wherein the plurality of discrete charge storage segments comprise a plurality of discrete charge storage dielectric features.

5. The monolithic three dimensional NAND string of claim 4 , wherein:

each of the plurality of discrete charge storage dielectric features comprises a nitride feature located in the respective clam-shaped blocking dielectric segment; and

the blocking dielectric segment, the nitride feature and the tunnel dielectric form oxide-nitride-oxide discrete charge storage structures of the NAND string.

6. The monolithic three dimensional NAND string of claim 1 , further comprising one of a source or drain electrode contacts the first wing portion of the semiconductor channel from above, and another one of a source or drain electrode which contacts the second wing portion of the semiconductor channel from above.

7. The monolithic three dimensional NAND string of claim 6 , further comprising a body contact electrode which contacts the connecting portion of the semiconductor channel from below.

Assignments (6)
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2024
From: SANDISK TECHNOLOGIES LLC
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069796/0423 →
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038807/0850 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 16, 2011
From: SANDISK CORPORATION
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 026287/0458 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2010
From: ALSMEIER, JOHANN
To: SANDISK CORPORATION
Reel/Frame 025537/0868 →
Continuity (1)
Related Publication 20120001247A1 · Jan 5, 2012