IP Library Granted Patent US 8,925,193
Granted Patent B2
US 8,925,193 · App. 12/830,805 · Granted Jan 6, 2015

Methods for fabricating circuit boards

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Quick Facts
Patent No.
US 8,925,193
App. No.
12/830,805
Granted
Jan 6, 2015
Kind
B2
Abstract

A method, and apparatus resulting from the method, for fabricating a circuit board suitable for mounting electronic components. The method includes drilling a plurality of through-holes in a plurality of dielectric sheets, forming a conductive film on at least one side of each of the plurality of dielectric sheets, and substantially filling each of the plurality of through holes with a conductive material. The conductive material is both electrically and thermally uninterrupted from a first face to a second face of each of the plurality of dielectric sheets. The plurality of dielectric sheets are then sequentially mounted, one atop another, to form the circuit board. The sequential mounting step is performed after the steps of drilling the plurality of through-holes, forming the conductive layer, and substantially filling the plurality of through-holes.

Claims (31)

1. A method for fabricating a circuit board suitable fir mounting electronic components, the method comprising

drilling a plurality of through-holes in a plurality of dielectric sheets;

forming a conductive film on at least one side of each of the plurality of dielectric sheets having the plurality of through-holes,

substantially plating/filling each of the plurality of through-holes with a conductive material after forming the conductive film on each of the plurality of dielectric sheets, the conductive material being, electrically and thermally uninterrupted from a first face to a second face of each of the plurality of dielectric sheets and not made with silver epoxy or copper epoxy; and

sequentially mounting each of the plurality of dielectric sheets, one atop another, to form the circuit board with at least one of the plurality of filled through-holes of each dielectric sheet being aligned to define at least one via that extends between opposing, side surfaces of the circuit board, the sequential mounting step being performed after the steps of drilling the plurality of through-holes, forming the conductive layer, and substantially filling the plurality of through-holes.

2. The method of claim 1 wherein each of the plurality of through-holes is performed by laser-drilling,

3. The method of claim 1 wherein each of the plurality of through-holes is performed by mechanically drilling.

4. The method of claim 1 wherein an ratio of the plurality of through holes after the step of sequentially mounting is selected to be at least 50:1.

5. The method of claim 1 wherein the conductive material is selected to he an individual material of copper.

6. The method of claim 1 wherein the conductive material is selected to he an individual material of tungsten.

7. The method of claim 1 wherein the conductive material is selected to be an individual material of tantalum.

8. The method of claim 1 wherein the conductive material is selected to be comprised of both titanium and tungsten.

9. The method of claim 1 wherein each of the plurality of dielectric sheets is formed front an organic material.

10. The method of claim 1 wherein each of the plurality of dielectric sheets is formed from a rigid material.

11. The method of claim 1 wherein one or more of the plurality of through-holes is arranged so as to form a blind via after the sequential mounting step.

12. The method of claim 1 wherein one or more of the plurality of through-holes is arranged so as to form a buried via after the sequential mounting step.

13. A method for fabricating a probe card suitable for mounting electronic components, the method comprising:

drilling a plurality of through-holes in a plurality of dielectric sheets;

forming a conductive film on at least one side of each of the plurality of dielectric sheets having, the plurality of through-holes, the conductive film arranged to define electrical traces;

substantially plating/filling each of the plurality of through-holes with a conductive material after forming the conductive film on each of the plurality of dielectric sheets, the conductive material being electrically and thermally uninterrupted from a first face to a second face of each of the plurality of dielectric sheets;

sequentially mounting each of the plurality of dielectric sheets, one atop another, to form the probe card with at least one of the plurality of filled through-holes of each dielectric sheet being aligned to define at least one via that extends between opposing side surfaces of the probe card, the sequential mounting step being performed after the steps of drilling the plurality of through-holes, forming the conductive layer, and substantially filling the plurality of through-holes; and

forming the probe card to allow mounting into an automated test equipment system.

14. The method of claim 13 wherein each of the plurality of through-holes is performed by laser-drilling.

15. The method of claim 13 wherein each of the plurality of through-holes is performed by mechanically drilling.

16. The method of claim 13 wherein an aspect ratio of the plurality of through-holes after the step of sequentially mounting is selected to be at least 50:1.

17. The method of claim 13 wherein the conductive material is selected to he copper.

18. The method of claim 13 wherein the conductive material is selected to be comprised of both titanium and tungsten.

19. The method of claim 13 wherein each of the plurality of dielectric sheets is formed from an organic material.

20. The method of claim 13 wherein each of the plurality of dielectric sheets is formed from a rigid material.

21. The method of claim 13 wherein one or more of the plurality of through-holes is arranged so as to form a blind via after the sequential mounting step.

22. The method of claim 13 wherein one or more of the plurality of through-holes is anointed so as to form a buried via after the sequential mounting step.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE ADDRESS PREVIOUSLY RECORDED AT REEL: 035371 FRAME: 0265. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 14, 2015
From: ADVANTEST (SINGAPORE) PTE. LTD.
To: ADVANTEST CORPORATION
Reel/Frame 035425/0768 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 6, 2015
From: ADVANTEST (SINGAPORE) PTE. LTD.
To: ADVANTEST CORPORATION
Reel/Frame 035371/0265 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 20, 2012
From: VERIGY (SINGAPORE) PTE LTD
To: ADVANTEST (SINGAPORE) PTE LTD
Reel/Frame 027896/0018 →