IP Library Granted Patent US 8,380,898
Granted Patent B2
US 8,380,898 · App. 12/832,409 · Granted Feb 19, 2013

Methods for main memory with non-volatile type memory modules

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Quick Facts
Patent No.
US 8,380,898
App. No.
12/832,409
Granted
Feb 19, 2013
Kind
B2
Abstract

A computing system is disclosed that includes a memory controller in a processor socket normally reserved for a processor. A plurality of non-volatile memory modules may be plugged into memory sockets normally reserved for DRAM memory modules. The non-volatile memory modules may be accessed using a data communication protocol to access the non-volatile memory modules. The memory controller controls read and write accesses to the non-volatile memory modules. The memory sockets are coupled to the processor socket by printed circuit board traces. The data communication protocol to access the non-volatile memory modules is communicated over the printed circuit board traces and through the sockets normally used to access DRAM type memory modules.

Claims (19)

1. A method in a server comprising:

executing a software application with a processor, wherein the software application is other than operating system software;

randomly accessing data in main memory with the software application including a random access for data in one or more pluggable non-volatile memory modules of a plurality of pluggable non-volatile memory modules plugged into a plurality of sockets on a first printed circuit board of the server, each pluggable non-volatile memory module including a plurality of non-volatile memory devices mounted to a second printed circuit board and having a read access time within twice a read access time of a dynamic random access memory module but a write access time greater than a write access time of the dynamic random access memory module; and

writing data into the pluggable non-volatile memory module in response to executing the software application.

2. The method of claim 1 , wherein

the main memory further includes

a plurality of pluggable dynamic random access memory modules plugged into a plurality of sockets on the first printed circuit board of the server, each pluggable dynamic random access memory module including a plurality of dynamic random access memory devices mounted to a third printed circuit board.

3. The method of claim 2 , wherein

the plurality of pluggable non-volatile memory modules and the plurality of pluggable dynamic random access memory modules are plugged into the same memory channel.

4. The method of claim 1 , wherein

the read access time of each pluggable non-volatile memory module is less than a write access time of the pluggable non-volatile memory module.

5. The method of claim 1 , wherein

the software application is a search engine to search for data on the server.

6. The method of claim 1 , further comprising:

writing code into the pluggable non-volatile memory module.

7. The method of claim 1 , wherein

the randomly accessing of data in the main memory is a random write of data into the main memory.

8. The method of claim 7 , wherein

the random write of data into the main memory includes a write of data into one or more pluggable non-volatile memory modules of the plurality of pluggable non-volatile memory modules.

Assignments (9)
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 053926 FRAME 0446 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058966/0321 →
SECURITY INTEREST Recorded Sep 29, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 053926/0446 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 9, 2020
From: VIRIDENT SYSTEMS, LLC
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 053180/0472 →
CHANGE OF NAME Recorded Jan 30, 2019
From: VIRIDENT SYSTEMS, INC
To: VIRIDENT SYSTEMS, LLC
Reel/Frame 048196/0580 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 7, 2013
From: KARAMCHETI, VIJAY; GANAPATHY, KUMAR; OKIN, KENNETH ALAN; PAREKH, RAJESH
To: VIRIDENT SYSTEMS, INC.
Reel/Frame 031188/0601 →