IP Library Assignment 053180/0472
Patent Assignment
Reel/Frame 053180/0472

Assignment of Assignor's Interest

Recorded: 2020-07-09 Pages: 9
Assignor
VIRIDENT SYSTEMS, LLC
Executed: 2020-06-10
Assignee
WESTERN DIGITAL TECHNOLOGIES, INC.
5601 GREAT OAKS PARKWAY, SAN JOSE, CALIFORNIA, 95119
Covered Properties (89)
Main Memory in a System with a Memory Controller Configured to Control Access to Non-Volatile Memory, and Related Technologies
Patent: 7,761,623 →
Application: 11/847,986 →
Publication: US 2008/0082731
Systems and Apparatus for Main Memory with Non-Volatile Type Memory Modules, and Related Technologies
Patent: 7,761,624 →
Application: 11/848,013 →
Publication: US 2008/0082732
Methods for Main Memory with Non-Volatile Type Memory Modules, and Related Technologies
Patent: 7,761,625 →
Application: 11/848,040 →
Publication: US 2008/0082733
Methods for Main Memory in a System with a Memory Controller Configured to Control Access to Non-Volatile Memory, and Related Technologies
Patent: 7,761,626 →
Application: 11/848,083 →
Publication: US 2008/0082734
Programmable heterogeneous memory controllers for main memory with different memory modules
Patent: 8,074,022 →
Application: 11/864,860 →
Publication: US 2008/0082751
Methods and Apparatus of Dual Inline Memory Modules for Flash Memory
Patent: 8,189,328 →
Application: 11/876,479 →
Publication: US 2008/0094808
Asymmetric Memory Migration in Hybrid Main Memory
Patent: 7,774,556 →
Application: 11/935,224 →
Publication: US 2008/0109629
Seamless Application Access to Hybrid Main Memory
Patent: 7,913,055 →
Application: 11/935,254 →
Publication: US 2008/0109592
Integrating Data from Symmetric and Asymmetric Memory
Patent: 7,818,489 →
Application: 11/935,275 →
Publication: US 2008/0177978
Writing to Asymmetric Memory
Patent: 7,930,513 →
Application: 11/935,281 →
Publication: US 2008/0109593
Distributing Metadata Across Multiple Different Disruption Regions Within an Asymmetric Memory System
Patent: 9,727,452 →
Application: 12/335,499 →
Publication: US 2009/0157989
Memory Modules for Two-Dimensional Main Memory
Patent: 8,806,116 →
Application: 12/369,725 →
Publication: US 2009/0210616
Systems for two-dimensional main memory including memory modules with read-writeable non-volatile memory devices
Patent: 8,856,464 →
Application: 12/369,728 →
Publication: US 2009/0210636
Methods for Upgrading Main Memory in Computer Systems to Two-Dimemsional Memory Modules and Master Memory Controllers
Patent: 9,251,899 →
Application: 12/369,733 →
Publication: US 2009/0254689
Random Read and Read/Write Block Accessible Memory
Patent: 8,417,873 →
Application: 12/490,914 →
Methods for a Random Read and Read/Write Block Accessible Memory
Patent: 8,745,314 →
Application: 12/490,930 →
Network Computing Systems Having Shared Memory Clouds with Addresses of Disk-Read-Only Memories Mapped into Processor Address Spaces
Patent: 8,521,967 →
Application: 12/490,941 →
Using Non-Volatile Memory Resources to Enable a Virtual Buffer Pool for a Database Application
Patent: 8,176,233 →
Application: 12/505,386 →
Systems and Apparatus for Main Memory
Patent: 8,364,867 →
Application: 12/831,206 →
Publication: US 2010/0274956
System and Apparatus with a Memory Controller Configured to Control Access to Randomly Accessible Non-Volatile Memory
Patent: 8,370,547 →
Application: 12/831,233 →
Publication: US 2010/0274957
Methods for Main Memory with Non-Volatile Type Memory Modules
Patent: 8,380,898 →
Application: 12/832,409 →
Publication: US 2010/0274959
Asymmetric Memory Migration in Hybrid Main Memory
Patent: 8,156,288 →
Application: 12/853,135 →
Publication: US 2010/0325383
Integrating Data from Symmetric and Asymmetric Memory
Patent: 8,156,302 →
Application: 12/899,709 →
Publication: US 2011/0022788
Seamless Application Access to Hybrid Main Memory
Patent: 8,205,061 →
Application: 13/048,012 →
Publication: US 2011/0167205
Writing to Asymmetric Memory
Patent: 8,266,407 →
Application: 13/053,371 →
Publication: US 2011/0173371
Systems for Sustained Read and Write Performance with Non-Volatile Memory
Patent: 8,341,300 →
Application: 13/162,572 →
Methods for Sustained Read and Write Performance with Non-Volatile Memory
Patent: 8,949,555 →
Application: 13/162,575 →
Methods for Data Redundancy Across Three or More Storage Devices
Patent: 8,225,006 →
Application: 13/163,273 →
Memory Apparatus for Early Write Termination and Power Failure
Patent: 8,677,037 →
Application: 13/163,461 →
Methods for Early Write Termination and Power Failure with Non-Volatile Memory
Patent: 8,516,172 →
Application: 13/163,481 →
Methods for Early Write Termination into Non-Volatile Memory with Metadata Write Operations
Patent: 8,429,318 →
Application: 13/163,493 →
Replaceable Non-Volatile Memory Apparatus with a Plurality of Pluggable Electrical Connectors
Patent: 8,706,932 →
Application: 13/163,544 →
Memory Apparatus for Replaceable Non-Volatile Memory
Patent: 8,639,863 →
Application: 13/163,561 →
Methods for Upgrading, Diagnosing, and Maintaining Replaceable Non-Volatile Memory
Patent: 8,650,343 →
Application: 13/163,571 →
Methods for Data Redundancy Across Replaceable Non-Volatile Memory Storage Devices
Patent: 8,689,042 →
Application: 13/163,581 →
Translating Memory Modules for Main Memory
Patent: 8,463,993 →
Application: 13/311,534 →
Publication: US 2012/0079181
Managing Memory Systems Containing Components with Asymmetric Characteristics
Patent: 8,407,439 →
Application: 13/441,663 →
Publication: US 2012/0198138
Asymmetric Memory Migration in Hybrid Main Memory
Patent: 8,555,002 →
Application: 13/443,086 →
Publication: US 2012/0198140
Integrating Data from Symmetric and Asymmetric Memory
Patent: 8,555,024 →
Application: 13/443,121 →
Publication: US 2012/0198141
Methods of Flash Dual Inline Memory Modules with Flash Memory
Patent: 8,881,389 →
Application: 13/457,170 →
Publication: US 2013/0003288
Using Non-Volatile Memory Resources to Enable a Virtual Buffer Pool for a Database Application
Patent: 8,478,931 →
Application: 13/465,790 →
Managing Memory Systems Containing Components with Asymmetric Characteristics
Patent: 8,639,901 →
Application: 13/493,766 →
Publication: US 2012/0254577
Seamless Application Access to Hybrid Main Memory
Patent: 8,782,373 →
Application: 13/525,960 →
Publication: US 2012/0260030
Handling Writes to a Memory Including Asymmetric and Symmetric Components
Patent: 8,639,910 →
Application: 13/608,937 →
Publication: US 2013/0007338
Methods for Early Write Termination with Non-Volatile Memory
Patent: 8,850,091 →
Application: 13/745,804 →
Non-Volatile Type Memory Modules for Main Memory
Patent: 8,943,245 →
Application: 13/747,424 →
Publication: US 2013/0138844
Apparatus with a Memory Controller Configured to Control Access to Randomly Accessible Non-Volatile Memory
Patent: 8,972,633 →
Application: 13/747,455 →
Publication: US 2013/0138872
Systems with Programmable Heterogeneous Memory Controllers for Main Memory
Patent: 8,874,843 →
Application: 13/750,811 →
Publication: US 2013/0138874
Managing the Write Performance of an Asymmetric Memory System
Application: 13/838,699 →
Publication: US 2014/0281133
System and Method to Improve Enterprise Reliability Through Tracking I/O Performance Metrics in Non-Volatile Random Access Memory
Patent: 9,842,660 →
Application: 13/841,026 →
Dynamic Restriping in Nonvolatile Memory Systems
Patent: 9,286,002 →
Application: 13/841,706 →
Synchronous Mirroring in Non-Volatile Memory Systems
Patent: 9,135,164 →
Application: 13/842,079 →
Publication: US 2014/0281138
Small Block Write Operations in Non-Volatile Memory Systems
Patent: 8,996,796 →
Application: 13/842,940 →
Small Block Write Operations in Non-Volatile Memory Systems
Patent: 9,021,188 →
Application: 13/843,511 →
Managing Asymmetric Memory System as a Cache Device
Patent: 9,122,588 →
Application: 13/843,714 →
Managing Memory Systems Containing Components with Asymmetric Characteristics
Patent: 9,514,038 →
Application: 13/850,100 →
Publication: US 2013/0219112
Managing the Write Performance of an Asymmetric Memory System
Patent: 9,323,663 →
Application: 13/927,740 →
Publication: US 2014/0281152
Managing the Write Performance of an Asymmetric Memory System
Patent: 9,164,891 →
Application: 13/927,871 →
Publication: US 2014/0281121
Using Non-Volatile Memory Resources to Enable a Virtual Buffer Pool for a Database Application
Patent: 9,436,597 →
Application: 13/932,534 →
Methods of Managing Power in Network Computer Systems
Patent: 9,513,695 →
Application: 13/952,567 →
Publication: US 2015/0032940
Methods of Communicating to Different Types of Memory Modules in a Memory Channel
Patent: 9,767,867 →
Application: 14/016,202 →
Publication: US 2014/0075106
Methods for Accessing Memory in a Two-Dimensional Main Memory Having a Plurality of Memory Slices
Patent: 9,251,061 →
Application: 14/016,218 →
Publication: US 2014/0075101
Multi-Chip Packaged Integrated Circuit with Flash Memory and Slave Memory Controller
Patent: 9,093,150 →
Application: 14/016,224 →
Publication: US 2014/0071755
Multi-Chip Packaged Flash Memory/Support Application Specific Integrated Circuit for Flash Dual Inline Memory Modules
Patent: 9,318,156 →
Application: 14/016,235 →
Publication: US 2014/0071610
Flash Dual Inline Memory Modules with Multiplexing Support Circuits
Patent: 9,336,835 →
Application: 14/016,250 →
Publication: US 2014/0071757
Asymmetric Memory Migration in Hybrid Main Memory
Patent: 9,262,333 →
Application: 14/047,603 →
Publication: US 2014/0258603
Integrating Data from Symmetric and Asymmetric Memory
Patent: 9,223,719 →
Application: 14/047,627 →
Publication: US 2014/0258653
Memory Apparatus and Methods Thereof for Preventing Read Errors on Weak Pages in a Non-Volatile Memory System
Patent: 9,582,417 →
Application: 14/177,216 →
Publication: US 2014/0304456
Shutdowns and Data Recovery to Avoid Read Errors Weak Pages in a Non-Volatile Memory System
Patent: 9,921,896 →
Application: 14/177,219 →
Publication: US 2014/0304560
Seamless Application Access to Hybrid Main Memory
Patent: 9,262,334 →
Application: 14/330,930 →
Publication: US 2015/0012721
Memory Channel Connected Non-Volatile Memory
Patent: 9,626,290 →
Application: 14/475,398 →
Publication: US 2014/0379969
Read Writeable Randomly Accessible Non-Volatile Memory Modules
Patent: 9,984,012 →
Application: 14/499,211 →
Publication: US 2016/0092384
Methods for Early Write Termination with Non-Volatile Memory
Patent: 9,727,112 →
Application: 14/500,980 →
Read and Write Access Performance for Non-Volatile Memory
Patent: 9,213,637 →
Application: 14/613,345 →
Small Block Write Operations in Non-Volatile Memory Systems
Patent: 9,304,908 →
Application: 14/667,804 →
Managing Asymmetric Memory System as a Cache Device
Application: 14/808,380 →
Publication: US 2015/0331806
Memory Modules with Multi-Chip Packaged Integrated Circuits Having Flash Memory
Patent: 9,536,609 →
Application: 14/810,346 →
Publication: US 2015/0332768
Synchronous Mirroring in Non-Volatile Memory Systems
Patent: 9,734,027 →
Application: 14/851,120 →
Publication: US 2016/0004612
Managing the Write Performance of an Asymmetric Memory System
Patent: 9,477,595 →
Application: 14/852,844 →
Publication: US 2016/0004635
Memory Server with Read Writeable Non-Volatile Memory
Patent: 9,983,797 →
Application: 14/968,875 →
Publication: US 2016/0110105
Seamless Application Access to Hybrid Main Memory
Patent: 9,836,409 →
Application: 14/989,386 →
Publication: US 2016/0117258
Asymmetric Memory Migration in Hybrid Main Memory
Patent: 9,672,158 →
Application: 14/990,314 →
Publication: US 2016/0117131
Dynamic Restriping in Nonvolatile Memory Systems
Patent: 9,811,285 →
Application: 15/067,284 →
Small Block Write Operations in Non-Volatile Memory Systems
Patent: 9,898,196 →
Application: 15/076,742 →
Managing the Write Performance of an Asymmetric Memory System
Patent: 9,588,698 →
Application: 15/077,282 →
Network Computer Systems with Power Management
Application: 15/092,492 →
Publication: US 2016/0342195
Front/Back Control of Integrated Circuits for Flash Dual Inline Memory Modules
Patent: 9,905,303 →
Application: 15/133,217 →
Publication: US 2016/0254061
Managing the Write Performance of an Asymmetric Memory System
Patent: 9,733,840 →
Application: 15/332,740 →
Publication: US 2017/0038981
Apparatus with a Memory Controller Configured to Control Access to Randomly Accessible Non-Volatile Memory
Application: 15/489,282 →
Publication: US 2017/0220461
Related Assignments (17)
Other recorded transfers of the patents in this record — the chain of ownership.
Security Agreement Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
Change of Name May 4, 2017
From: VIRIDENT SYSTEMS, INC.
To: VIRIDENT SYSTEMS, LLC
Reel/Frame 042402/0617 →
Change of Name May 12, 2017
From: VIRIDENT SYSTEMS, INC.
To: VIRIDENT SYSTEMS, LLC
Reel/Frame 042456/0935 →
Change of Name May 12, 2017
From: VIRIDENT SYSTEMS, INC.
To: VIRIDENT SYSTEMS, LLC
Reel/Frame 042456/0865 →
Change of Name May 12, 2017
From: VIRIDENT SYSTEMS, INC.
To: VIRIDENT SYSTEMS, LLC
Reel/Frame 042456/0912 →
Change of Name May 12, 2017
From: VIRIDENT SYSTEMS, INC.
To: VIRIDENT SYSTEMS, LLC
Reel/Frame 042456/0962 →
Change of Name May 15, 2017
From: VIRIDENT SYSTEMS, INC.
To: VIRIDENT SYSTEMS, LLC
Reel/Frame 042462/0185 →
Change of Name Jan 30, 2019
From: VIRIDENT SYSTEMS, INC
To: VIRIDENT SYSTEMS, LLC
Reel/Frame 048196/0580 →
Security Interest Sep 29, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 053926/0446 →
Release of Security Interest at Reel 053926 Frame 0446 Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058966/0321 →
Patent Collateral Agreement - Ddtl Loan Agreement Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
Patent Collateral Agreement - a&R Loan Agreement Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
Assignment of Assignor's Interest May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
Change of Name Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
Patent Collateral Agreement Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
Assignment of Assignor's Interest Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
Security Agreement (Supplemental) Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →