Memory channel connected non-volatile memory
View Patent ↗An apparatus includes a printed circuit board with a plurality of printed circuit board traces, a memory controller mounted on the printed circuit board coupled to one or more of the plurality of printed circuit board traces, a plurality of non-volatile type of memory integrated circuits coupled to the printed circuit board, and a plurality of support integrated circuits coupled between the memory controller and the plurality of non-volatile type of memory integrated circuits.
1. An apparatus, comprising:
a printed circuit board including an edge connector configured to fit a dual in-line memory module (DIMM) socket of a motherboard of a computer;
at least one non-volatile random access memory (NVRAM) module mounted to the printed circuit board; and
an NVRAM controller mounted to the printed circuit board, the NVRAM controller coupled to and between the edge connector and the at least one NVRAM module, the NVRAM controller being configured to control read and write accesses to the at least one NVRAM module,
wherein the apparatus requires a presence of one or more dynamic random access memory (DRAM) DIMMs on the motherboard of the computer and is configured to expand a capacity of a main memory of the computer, and
wherein at least one memory controller directly controls the one or more DRAM DIMMs, is not the NVRAM controller, and is not a general processor for the computer.
2. The apparatus of claim 1 , wherein the at least one NVRAM module includes flash memory.
3. The apparatus of claim 1 , wherein
access times to the at least one NVRAM module are sufficiently low to enable use thereof in the main memory of the computer.
4. The apparatus of claim 1 , further comprising:
at least one buffer circuit.
5. The apparatus of claim 4 , wherein
the at least one buffer circuit is configured to at least one of buffer addresses, multiplex data and de-multiplex data.
6. A computer, comprising:
a motherboard;
a processor coupled to the motherboard;
a memory channel coupled to the processor;
a plurality of dual in-line memory module (DIMM) sockets coupled to the memory channel and configured to accommodate a main memory of the computer, the main memory of the computer comprising:
a dynamic random access memory (DRAM) DIMM fitted within one of the plurality of DIMM sockets; and
a device, comprising:
a printed circuit board including an edge connector fitted within another one of the plurality of DIMM sockets;
at least one non-volatile random access memory (NVRAM) module mounted to the printed circuit board; and
an NVRAM controller mounted to the printed circuit board, the NVRAM controller coupled to and between the edge connector and the at least one NVRAM module, the NVRAM controller being configured to control read and write access requests to the at least one NVRAM module issued by the processor over the memory channel,
wherein the device requires a presence of the DRAM DIMM within the one of the plurality of DIMM sockets and is configured to expand a capacity of the main memory beyond a capacity of the DRAM DIMM, and
wherein a memory controller directly controls the DRAM DIMM, is not the NVRAM controller, and is not a general processor for the computer.
7. The computer of claim 6 , wherein
the at least one NVRAM module includes flash memory.
8. The computer of claim 6 , wherein
access times to the at least one NVRAM module are sufficiently low to enable use thereof in the memory channel coupled to the processor.
9. The computer of claim 6 , wherein
the device further comprises at least one buffer circuit.
10. The computer of claim 9 , wherein
the at least one buffer circuit is configured to at least one of buffer addresses, multiplex data and de-multiplex data.
11. The computer of claim 6 , wherein
the computer is a server comprising one of four DIMM sockets and eight DIMM sockets.