Patent Assignment
Reel/Frame 068762/0494
PATENT COLLATERAL AGREEMENT
Recorded: 2024-08-23
Received: 2024-08-23
Pages: 156
Assignor
SANDISK TECHNOLOGIES, INC.
Executed: 2024-08-20
Assignee
JPMORGAN CHASE BANK, N.A., AS THE AGENT
10 SOUTH DEARBORN, CHICAGO, IL, 60603, UNITED STATES
Covered Applications
(100)
MULTI-LEVEL SOT MRAM ARRAY AND METHOD OF MAKING THE SAME
App. No. 18/795,826
→
Data Storage Device and Method for Reusing a Hardware Encoder in a RAID Recovery Operation
App. No. 18/791,815
→
CROSS TEMPERATURE NAND READ ADJUSTMENT
App. No. 18/791,689
→
Converting DIX To DIF Using HMB Buffer Management
App. No. 18/790,549
→
COARSE/FINE PROGRAMMING OF NON-VOLATILE MEMORY FOR TIGHTER THRESHOLD VOLTAGE DISTRIBUTIONS
App. No. 18/787,792
→
Data Storage Device and Method for Metadata Retrieval and Bypassing
App. No. 18/785,249
→
MODELLING AND PREDICTION OF VIRTUAL QUALITY CONTROL DATA INCORPORATING AREA LOCATION IN THE PRODUCTION OF MEMORY DEVICES
App. No. 18/785,389
→
Data Storage Device and Method for Providing an Efficient Multitenancy Arrangement in High-Capacity Data Storage Devices
App. No. 18/783,863
→
APPARATUS AND METHODS FOR DETECTING COUPLING FAULTS IN NON-VOLATILE MEMORY DEVICES
App. No. 18/784,505
→
SPARE BLOCK POOL MANAGEMENT IN STORAGE DEVICES
App. No. 18/780,782
→
OPTIMIZING CACHING OF A LOGICAL-TO-PHYSICAL (L2P) TRANSLATION TABLE IN STORAGE DEVICES
App. No. 18/781,280
→
MANAGING READ LOOK AHEAD CACHING IN STORAGE DEVICES
App. No. 18/780,924
→
LINK RECEIVER CIRCUITRY FOR CONTROLLER-MEMORY DEVICE INTERFACES IN DATA STORAGE DEVICES
App. No. 18/780,696
→
Adaptive Spare Block Cycling With Multi-Die Blocks
App. No. 18/779,891
→
Data Storage Device and Method for Using Multiple Models for Predicting a Read Threshold
App. No. 18/777,942
→
METAL INTERCONNECT STRUCTURES AND SEMI-DAMASCENE METHOD FOR FORMING THE SAME
App. No. 18/776,480
→
Data Integrity Protection Of SSDs Utilizing Streams
App. No. 18/776,797
→
Zoned Namespaces in Solid-Stage Drives
App. No. 18/776,740
→
Selective Information Sharing Between Different Storage Devices
App. No. 18/776,061
→
Embedded PHY (EPHY) IP Core for FPGA
App. No. 18/774,286
→
AUTHENTICATABLE ENCLOSURE FOR AN ELECTRONIC DEVICE
App. No. 18/774,511
→
LOGICAL BLOCK ADDRESS LEVEL DATA PROTECTION SCHEME
App. No. 18/774,531
→
SEMICONDUCTOR PACKAGE HAVING INTERCONNECTABLE SUBSTRATES
App. No. 18/774,312
→
Data Storage Device and Method for Using Modular Models for Inferring a Read Threshold
App. No. 18/772,563
→
HYBRID BLOCK MANAGEMENT WITH DYNAMIC SLC VERIFY
App. No. 18/771,651
→
Dynamic Integrity and Data Encryption (IDE) Aggregation Size
App. No. 18/770,407
→
Controller Memory Buffer (CMB) Doorbell Synchronization
App. No. 18/770,399
→
Flexible and Dynamic Multi-Table Overlap Cache Occupation Bitmap
App. No. 18/770,419
→
Data Storage Device and Method for Gesture Generation and Management
App. No. 18/765,593
→
GAT BLOCK ALLOCATION
App. No. 18/766,012
→
THREE-DIMENSIONAL MEMORY DEVICE WITH THROUGH-STACK CONTACT VIA STRUCTURES AND METHODS FOR FORMING THE SAME
App. No. 18/763,704
→
NON-VOLATILE MEMORY WITH USAGE DEPENDENT SUSPEND RESUME
App. No. 18/763,370
→
WRITE ACCUMULATION TRIGGERED BLOCK ERASE IN A DATA STORAGE DEVICE
App. No. 18/761,695
→
COMPUTE-IN-MEMORY USING NEURAL NETWORKS STORED IN A NON-VOLATILE MEMORY FOR PREDICTIVE BLOCK HEALTH ASSESSMENT OF THE NON-VOLATILE MEMORY
App. No. 18/761,586
→
RELINKING SCHEME FOR SUB-BLOCKS OF GROWN BAD MEMORY BLOCKS
App. No. 18/761,680
→
Data Storage Device and Method for Accommodating Data of a Third-Party System
App. No. 18/760,436
→
TEMPERATURE MEASUREMENT DEVICE FOR MEASURING A SURFACE TEMPERATURE OF A SEMICONDUCTOR PACKAGE
App. No. 18/760,901
→
Data Storage Device and Method for Device-Initiated Hibernation
App. No. 18/760,409
→
APPARATUS AND METHODS FOR REFERENCE READ TECHNIQUES FOR THRESHOLD SELECTOR DEVICE MEMORY
App. No. 18/757,932
→
REDUCTION IN CHIP AREA THROUGH DESIGN-TECHNOLOGY CO-OPTIMIZATION
App. No. 18/758,643
→
CBA SEMICONDUCTOR DEVICE WITH EDGE CONNECTIONS
App. No. 18/758,785
→
HIGH BANDWIDTH FLASH MEMORY CONTAINING A STACK OF BONDED LOGIC AND MEMORY DIE ASSEMBLIES AND METHODS FOR FORMING THE SAME
App. No. 63/665,731
→
SELECTOR ONLY MEMORY WRITE OPERATION
App. No. 18/757,102
→
NON-VOLATILE MEMORY WITH WORD LINE RAMP SENSING FOR MEMORY CELL TRACKING
App. No. 18/756,481
→
DIFFERENTIAL WRITE AND READ FOR SELECTOR ONLY MEMORY
App. No. 18/757,129
→
APPARATUS AND METHODS FOR REDUCING NEAR-NEAR - FAR-FAR MEMORY CELL RESISTANCE DIFFERENCES IN MEMORY ARRAYS
App. No. 18/756,676
→
SEMICONDUCTOR DEVICE INCLUDING PAIRED MEMORY DEVICES
App. No. 18/756,374
→
APPARATUS AND METHODS FOR AMPLIFIER CIRCUITS FOR READING MRAM MEMORY CELLS
App. No. 18/756,731
→
PROGRESSIVE SEASONING FOR THRESHOLD SWITCHING SELECTORS
App. No. 18/756,373
→
Peer Configuration of Compute Resources Among Data Storage Devices
App. No. 18/753,323
→
BIPOLAR DECODERS FOR NONVOLATILE MEMORY
App. No. 18/752,697
→
DATA STORAGE MANAGEMENT BASED ON USER CALENDAR EVENTS
App. No. 18/750,880
→
GAME ASSET BASED DISPLAY CONTROL IN STORAGE DEVICES
App. No. 18/751,129
→
INTELLIGENT DATA DUPLICATION/BACKUP BASED ON ARTIFICIAL INTELLIGENCE FOR DATA STORAGE DEVICES
App. No. 18/748,013
→
COLUMN REDUNDANCY DATA CIRCUITS AND METHODS FOR HIGHER TRANSMIT SPEED
App. No. 18/623,189
→
EMBEDDED ALIGNED FIDUCIAL MARKERS FOR STACKED FANOUT SEMICONDUCTOR DEVICE
App. No. 18/621,497
→
BUILT-IN SELF-TEST CIRCUITRY FOR DATA IN PATH FOR NON-VOLATILE MEMORY WITH MULTIPLE TEST CLOCK SPEEDS FOR MULTIPLE TEST MODES
App. No. 18/619,466
→
STORAGE METHODS AND DEVICES WITH SECURE CUSTOMER-UPDATABLE MACHINE LEARNING MODELS
App. No. 18/615,678
→
NONVOLATILE MEMORY WITH FAST PROGRAM VOLTAGE RAMP DOWN
App. No. 18/614,774
→
METHOD OF MAKING HIGH ASPECT RATIO OPENINGS IN A SEMICONDUCTOR DEVICE USING ION IMPLANTATED REGROWN CLADDING MASK
App. No. 18/613,834
→
Data Storage Device and Method for Dynamic Flash Interface Module (FIM) Load Balancing for Memory Die Sharing
App. No. 18/610,423
→
Solution for Super Device Imbalance in ZNS SSD
App. No. 18/609,042
→
Predictive Adjustment of Distributed Surveillance Video Data Capture Using Networks of Graph Maps
App. No. 18/608,334
→
STORING MULTIPLE VERSIONS OF PRELOADED CONTENT TO MITIGATE CROSS-TEMPERATURE IMPACT
App. No. 18/608,265
→
PROCESSING CORE INCLUDING INTEGRATED HIGH CAPACITY HIGH BANDWIDTH STORAGE MEMORY
App. No. 18/608,695
→
SEMICONDUCTOR PACKAGE HAVING AN INTEGRATED PASSIVE DEVICE THAT ACTS AS A SPACER
App. No. 18/606,010
→
Data Storage Device and Method for Multi-Tenant Dynamic Bandwidth Reallocation
App. No. 18/603,525
→
READ PARAMETER ZONING
App. No. 18/598,656
→
SELF-LEARNING BUILT-IN SELF-TEST (BIST) FOR LEAK DETECTION IN NON-VOLATILE MEMORY
App. No. 18/594,800
→
Multi-Protocol Data Storage Device and Method for Sustained Write Performance
App. No. 18/591,661
→
LOW ERROR RATE READ OPERATION IN MULTI-MODULE ARRAYS
App. No. 18/591,904
→
Data Storage Device and Method for Data Routing for Wear Levelling in Multi-Meta-Die Data Storage Devices
App. No. 18/590,503
→
DATA STORAGE DEVICE AND METHOD OF ACCESS IN CONFIDENTIAL MODE AND NORMAL MODE
App. No. 18/589,424
→
DETERMINISTIC RESIZING OF UNMAP COMMANDS
App. No. 18/589,138
→
Data Storage Device and Method for Managing a Hot Count Difference in Sub-Block Mode
App. No. 18/586,943
→
APPARATUS AND METHODS FOR REDUCING NUMBER OF LAYOUT TRACKS FOR SENSE AMPLIFIERS
App. No. 18/587,700
→
ADDING SACRIFICIAL TRACES TO ABORB SIGNAL INTERFERENCE FROM HIGH SPEED AGGRESSOR TRACES
App. No. 18/585,866
→
STEP-DOWN PRINTED CIRCUIT BOARD WITH A FLEXIBLE CONNECTOR
App. No. 18/584,729
→
HANDLING GROWN BAD BLOCKS IN A MEMORY DEVICE
App. No. 18/584,113
→
STORAGE DEVICE COOLING AIR VENTILATION FEATURES
App. No. 18/583,458
→
ALLOCATING DATA STORAGE DEVICE RESOURCES BASED ON DETERMINED CAPABILITIES OF A HOST DEVICE
App. No. 18/583,061
→
OPTIMIZED HANDLING OF NEIGHBOR PLANE DISTURB ISSUES
App. No. 18/581,730
→
Data Storage Device and Method for Using an Adaptive, Configurable Storage Indirection Unit
App. No. 18/442,624
→
Efficient Sequential Write Gap Processing
App. No. 18/441,343
→
Data Storage Device and Method for Managing Memory Maintenance Operations
App. No. 18/441,095
→
REFERENCE FILE MANAGEMENT FOR ARTIFICIAL INTELLIGENCE MODELS
App. No. 18/440,263
→
Data Storage Device
App. No. 29/928,458
→
Data Storage Device
App. No. 29/928,447
→
Data Storage Device and Method for Hiding Tweak Generation Latency
App. No. 18/439,107
→
PRINTED CIRCUIT BOARD HAVING LEAD PADS THAT ACCOMMODATE OFFSET ELECTRONIC COMPONENT LEADS
App. No. 18/438,059
→
USING A ZONE WORDLINE TABLE TO INITIATE A FIND LAST GOOD PAGE PROCESS
App. No. 18/436,408
→
Data Storage Device and Method for Accident-Mode Storage of Vehicle Information
App. No. 18/434,976
→
ACHIEVING UNIFORM BANDWIDTH USING BLENDED MEMORY BLOCKS FOR RELOCATION OPERATIONS
App. No. 18/426,768
→
TWO-WAY RECEPTACLE FOR UNIVERSAL SERIAL BUS
App. No. 18/426,878
→
FEED-FORWARD DATA TOGGLING BASED DELAY CIRCUIT
App. No. 18/425,850
→
NON-TARGET ON-DIE TERMINATION
App. No. 18/425,832
→
DYNAMIC SENSING SCHEME TO COMPENSATE FOR THRESHOLD VOLTAGE SHIFT DURING SENSING IN A MEMORY DEVICE
App. No. 18/423,474
→
THREE-DIMENSIONAL MEMORY DEVICE CONTAINING SPLIT SUPPORT PILLAR STRUCTURES AND METHODS OF MAKING THE SAME
App. No. 18/421,417
→
Data Storage Device and Method for Host-Based Dynamic Jump Range Identification
App. No. 18/419,823
→
Optimizing Usage Of Multiple Write Paths On Multi-Tenant Storage Devices
App. No. 18/420,014
→