Seamless application access to hybrid main memory
A command from an application is received to access a data structure associated with one or more virtual addresses mapped to main memory. A first subset of the virtual addresses for the data structure having constituent addresses that are mapped to the symmetric memory components and a second subset of the virtual addresses for the data structure having constituent addresses that are mapped to the asymmetric memory components are identified. Data associated with the virtual address from the first physical addresses and data associated with the virtual addresses from the second physical addresses are accessed. The data associated with the symmetric and asymmetric memory components is accessed by the application without providing the application with an indication of whether the data is accessed within the symmetric memory component or the asymmetric memory component.
1. A system comprising:
a memory system that has multiple parts including at least a first part of the memory system that is different from a second part of the memory system in that the first part of the memory system has different access characteristics than the second part of the memory system or the first part of the memory system is used for a different type of memory dependent operation than the second part of the memory system; and
a controller configured to perform operations comprising:
receiving a request from an application to access a data structure;
determining whether the request pertains to store the data structure on the memory system or to read the data structure from the memory system;
in response to determining that the request pertains to read the data structure from the memory system, determining that the data structure is associated with multiple virtual addresses mapped to the memory system;
querying, based on the multiple virtual addresses associated with the data structure, a table that manages first virtual addresses associated with first physical addresses in the first part of the memory system and second virtual addresses associated with second physical addresses within the second part of the memory system;
identifying, based on results of querying the table, a first subset of the virtual addresses for the data structure having constituent addresses that are mapped to the first part of the memory system and a second subset of the virtual addresses for the data structure having constituent addresses that are mapped to the second part of the memory system;
in response to identifying the first subset of virtual addresses for the data structure that are mapped to the first part of the memory system, identifying, from among the first physical addresses in the first part of the memory system, a first subset of physical addresses in the first part of the memory system that correspond to the first subset of virtual addresses for the data structure and accessing data from the first part of the memory system using the first subset of physical addresses;
in response to identifying the second subset of virtual addresses for the data structure that are mapped to the second part of the memory system, identifying, from among the second physical addresses within the second part of the memory system, a second subset of physical addresses within the second part of the memory system that correspond to the second subset of virtual addresses for the data structure and accessing data from the second part of the memory system using the second subset of physical addresses;
generating a response to the request received from the application to access the data structure by integrating the data accessed from the first part of the memory system using the first subset of physical addresses and the data accessed from the second part of the memory system using the second subset of physical addresses;
in response to determining that the request pertains to store the data structure on the memory system, determining, using a memory controller on the memory system, whether the data structure resides in the second part of the memory system;
in response to determining that the data structure resides in the second part of the memory system, identifying, using the memory controller, memory disruption characteristics related to storing the data structure in the second part of the memory system;
based on the identified memory disruption characteristics related to storing the data structure in the second part of the memory system, determining, using the memory controller, whether to store the data structure in the second part of the memory system; and
in response to a determination to store the data structure in the second part of the memory system, storing the data structure in the second part of the memory system.
2. The system of claim 1 , wherein the operations further comprise:
accounting for movement, during execution of the request from the application to read data associated with multiple virtual addresses, of data between the first part of the memory system and the second part of the memory system.
3. The system of claim 2 , wherein a particular virtual address included in the multiple virtual addresses is mapped, in the table, to a particular physical address in the first part of the memory system when the request from the application to read data associated with multiple virtual addresses is received, and accounting for movement, during execution of the request from the application to read data associated with multiple virtual addresses, of data between the first part of the memory system and the second part of the memory system includes:
subsequent to receiving the request and prior to reading data corresponding to the particular virtual address included in the multiple virtual addresses, performing a memory migration operation on the data corresponding to the particular virtual address by moving the data corresponding to the particular virtual address from the particular physical address in the first part of the memory system to a particular physical address in the second part of the memory system and updating a portion of the table corresponding to the particular virtual address to reflect the particular physical address in the second part of the memory system; and
reading the data corresponding to the particular virtual address from the particular physical address in the second part of the memory system.
4. The system of claim 2 , wherein a particular virtual address included in the multiple virtual addresses is mapped, in the table, to a particular physical address in the second part of the memory system when the request from the application to read data associated with multiple virtual addresses is received, and accounting for movement, during execution of the request from the application to read data associated with multiple virtual addresses, of data between the first part of the memory system and the second part of the memory system includes:
subsequent to receiving the request and prior to reading data corresponding to the particular virtual address included in the multiple virtual addresses, performing a memory migration operation on the data corresponding to the particular virtual address by moving the data corresponding to the particular virtual address from the particular physical address in the second part of the memory system to a particular physical address in the first part of the memory system and updating a portion of the table corresponding to the particular virtual address to reflect the particular physical address in the first part of the memory system; and
reading the data corresponding to the particular virtual address from the particular physical address in the first part of the memory system.
5. The system of claim 1 , wherein the first part of the memory system is a symmetric memory component and the second part of the memory system is an asymmetric memory component.
6. The system of claim 1 , wherein the first part of the memory system is a volatile memory component and the second part of the memory system is a non-volatile memory component.
7. The system of claim 1 , wherein the first part of the memory system is a dynamic random access memory component and the second part of the memory system is a flash memory component.
8. The system of claim 1 , wherein the first part of the memory system has first absolute read and write speeds that are faster than second absolute read and write speeds of the second part of the memory system and a first difference between write speed and read speed of the first part of the memory system is less than a second difference between write speed and read speed of the second part of the memory system.
9. The system of claim 1 , wherein the first part of the memory system has different access characteristics than the second part of the memory system.
10. The system of claim 1 , wherein the first part of the memory system is used for a different type of memory-dependent operation than the second part of the memory system.
11. The system of claim 1 , wherein the operations further comprise:
providing the generated response to the application without providing the application with an indication of whether the data included in the response was accessed within the first part of the memory system or the second part of the memory system.
12. The system of claim 1 , wherein identifying, using the memory controller, memory disruption characteristics related to storing the data structure in the second part of the memory system comprises:
identifying a physical address of the data structure within the second part of the memory system,
identifying a disruption region within the second part of the memory system, that corresponds to the identified physical address, and
determining memory usage characteristics of the identified disruption region within the second part of the memory system; and
determining, using the memory controller, whether to store the data structure in the second part of the memory system comprises:
determining, using the memory controller, whether to store the data structure in the second party or the first part of the memory system based on the determined memory usage characteristics of the identified disruption region within the second part of the memory system.
13. The system of claim 12 , wherein determining, using the memory controller, whether to store the data structure in the second part or the first part of the memory system based on the determined memory usage characteristics of the identified disruption region within the second part of the memory system comprises:
determining to store the data structure in the second part of the memory system conditioned on the determined memory usage characteristics of the identified disruption region indicating that storing the data structure in the second part of the memory system represents a relatively low level of disruption because the identified disruption region has a relatively low level of memory usage.
14. The system of claim 13 wherein determining, using the memory controller, whether to store the data element in the second part or the first part of the memory system based on the determined memory usage characteristics of the identified disruption region within the second part of the memory system comprises:
determining to store the data structure in the first part of the memory system conditioned on the determined memory usage characteristics of the identified disruption region indicating that storing the data structure in the second part of the memory system represents a relatively high level of disruption because the identified disruption region has a relatively high level of memory usage.
15. The system of claim 12 wherein:
identifying, using the memory controller, memory disruption characteristics related to storing the data structure in the second part of the memory system comprises:
identifying a first size of the data structure;
identifying a second size of a disruption region within the second part of the memory system in which the data structure resides, and
identifying memory disruption characteristics that reflect a comparison of the first size of the data structure and the second size of the disruption region within the second part of the memory system in which the data structure resides; and
determining, using the memory controller, whether to store the data element in the second part of the memory system comprises:
determining, using the memory controller, whether to store the data element in the second part or the first part of the memory system based on the identified memory disruption characteristics that reflect a comparison of the first size of the data structure and the second size of the disruption region within the second part of the memory system in which the data structure resides.
16. The system of claim 12 , wherein:
identifying, using the memory controller, memory disruption characteristics related to storing the data element in the asymmetric memory component comprises:
identifying a first size of the data element;
identifying a second size of a disruption region within the asymmetric memory
component of the main memory in which the data element resides, and
identifying memory disruption characteristics that reflect a comparison of the first size of the data structure and the second size of the disruption region within the second part of the memory system in which the data structure resides; and
determining, using the memory controller, whether to store the data structure in the second part or the first part of the memory system comprises:
determining, using the memory controller, whether to store the data structure in the second part or the first part of the memory system based on the identified memory disruption characteristics that reflect a comparison of the first size of the data structure and the second size of the disruption region within the second part of the memory system in which the data structure resides.
17. The system of claim 16 wherein determining, using the memory controller, whether to store the data structure in the second part or the first part of the memory system based on the identified memory disruption characteristics that reflect a comparison of the first size of the data structure and the second size of the disruption region within the second part of the memory system in which the data structure resides comprises:
determining to store the data structure in the second part of the memory system conditioned on the identified memory disruption characteristics that reflect a comparison of the first size of the data structure and the second size of the disruption region within the second part of the memory system in which the data structure resides indicating that storing the data structure in the second part of the memory system represents a relatively low level of disruption because the first size of the data structure is relatively close to the second size of the disruption region.
18. The system of claim 16 wherein determining to store the data structure in the asymmetric memory component comprises determining to store the data element in the asymmetric memory component conditioned on the first size of the data element being the same as the second size of the disruption region.
19. The system of claim 17 wherein determining, using the memory controller, whether to store the data structure in the second part or the first part based on the identified memory disruption characteristics that reflect a comparison of the first size of the data structure and the second size of the disruption region within the second part of the memory system in which the data structure resides comprises:
determining to store the data structure in the first part conditioned on the identified memory disruption characteristics that reflect a comparison of the first size of the data structure and the second size of the disruption region within the asymmetric memory component of the main memory in which the data structure resides indicating that storing the data structure in the second part of the memory system represents a relatively high level of disruption because the first size of the data structure is smaller than the second size of the disruption region.