Managing asymmetric memory system as a cache device
View Patent ↗Some implementations provide a method for managing data in a storage system that includes a persistent storage device and a non-volatile random access memory (NVRAM) cache device. The method includes: accessing a direct mapping between a logical address associated with data stored on the persistent storage device and a physical address on the NVRAM cache device; receiving, from a host computing device coupled to the storage system, a request to access a particular unit of data stored on the persistent storage device; using the direct mapping as a basis between the logical address associated with the data stored on the persistent storage device and the physical address on the NVRAM cache device to determine whether the particular unit of data being requested is present on the NVRAM cache device.
1. A method for managing data in a storage system comprising a persistent storage device and a non-volatile random access memory (NVRAM) cache device, the method comprising:
accessing a direct mapping between a logical address associated with data stored on the persistent storage device and a physical address on the NVRAM cache device;
receiving, from a host computing device coupled to the storage system, a request to access a particular unit of data stored on the persistent storage device;
mapping through a key representing the logical address in a logical address space that maps the logical address to a physical addresses within a physical size of the NVRAM cache device that is smaller than the logical address space through use of one of a message-digest, checksum and cyclic redundancy check hash function to determine whether the particular unit of data being requested is present on the NVRAM cache device;
in response to determining that the particular unit of data being requested is present on the NVRAM cache device, servicing the request by accessing a copy of the particular unit of data present on the NVRAM cache device; and
in response to determining that the particular unit of data being requested is not present on the NVRAM cache device, servicing the request by accessing the particular unit of data stored on the persistent storage device.
2. The method of claim 1 , further comprising:
using a logical block address as the logical address to specify a logical location of the data stored on the persistent storage device; and
using the physical address to identify a physical location on the NVRAM cache device where a copy of the data is stored.
3. The method of claim 1 , wherein in response to determining that the particular unit of data being requested is not present on the NVRAM cache device, and subsequent to servicing the request by accessing the particular unit of data stored on the persistent storage device, choosing a data unit from the NVRAM cache device to evict such that a copy of the particular unit of data is placed in the NVRAM cache device.
4. The method of claim 3 , wherein choosing a data unit from the NVRAM cache device to evict comprises choosing a data unit with a lower ranking of importance than an otherwise unchosen data unit.
5. The method of claim 3 , further comprising:
evicting clean data from the NVRAM cache device, wherein the clean data has a matching copy on the persistent storage device; and
updating the direct mapping such that a new hash key is generated that would map a logical address in the logical address space to the physical address that used to hold the clean data.
6. The method of claim 1 , wherein receiving the request to access data stored on the persistent storage device includes one of: receiving a read request, receiving a write request, or receiving a garbage collection request.
7. The method of claim 6 , further comprising: deleting, and without writing to the persistent storage device, the copy of a particular unit of data present on the NVRAM cache device in response to receiving the garbage collection request.
8. The method of claim 1 , further comprising:
based on determining that the particular unit of data is present on the NVRAM cache device, determining whether the copy of the particular unit of data present on the NVRAM cache device is in a non-updated state, wherein the copy of the particular unit of data present on the NVRAM cache device is in the non-updated state when the copy of the particular unit of data present on the NVRAM cache device is identical to the particular unit of data stored on the persistent storage device.
9. The method of claim 1 , further comprising:
based on determining that the particular unit of data is present on the NVRAM cache device, determining whether the copy of the particular unit of data present on the NVRAM cache device is in an updated state, wherein the copy of the particular unit of data present on the NVRAM cache device is in the updated state when the copy of the particular unit of the data present on the NVRAM cache device is not identical to the particular unit of data stored on the persistent storage device.
10. A NVRAM-based storage subsystem comprising:
a persistent storage device; and
a NVRAM cache device in communication with the persistent storage device, the NVRAM cache device comprises:
flash memory media; and
a controller in communication with a host computing device, the controller configured to:
access a direct mapping between a logical address associated with data stored on the persistent storage device and a physical address on the NVRAM cache device;
receive, from a host computing device coupled to the storage system, a request to access a particular unit of data stored on the persistent storage device;
mapping through a key representing the logical address in a logical address space that maps the logical address to physical addresses within a physical size of the NVRAM cache device that is smaller than the logical address space through use of one of a message-digest, checksum and cyclic redundancy check hash function to determine whether the particular unit of data being requested is present on the NVRAM cache device;
in response to determining that the particular unit of data being requested is present on the NVRAM cache device, service the request by accessing a copy of the particular unit of data present on the NVRAM cache device; and
in response to determining that the particular unit of data being requested is not present on the NVRAM cache device, service the request by accessing the particular unit of data stored on the persistent storage device.
11. The NVRAM-based storage subsystem of claim 10 , wherein the controller is configured to:
use a logical block address as the logical address to specify a logical location of the data stored on the persistent storage device; and
use the physical address to identify a physical location on the NVRAM cache device where a copy of the data is stored.
12. The NVRAM-based storage subsystem of claim 10 , wherein the controller is configured to:
in response to determining that the particular unit of data being requested is not present on the NVRAM cache device, and subsequent to servicing the request by accessing the particular unit of data stored on the persistent storage device, choose a data unit from the NVRAM cache device to evict such that a copy of the particular unit of data is placed in the NVRAM cache device.
13. The NVRAM-based storage subsystem of claim 12 , wherein the controller is configured to choose a data unit from the NVRAM cache device to evict by choosing a data unit with a lower ranking of importance than an otherwise unchosen data unit.
14. The NVRAM-based storage subsystem of claim 12 , wherein the controller is configured to:
evict clean data from the NVRAM cache device, wherein the clean data has a matching copy on the persistent storage device; and
update the direct mapping such that a new hash key is generated that would map a logical address in the logical address space to the physical address that used to hold the clean data.
15. The NVRAM-based storage subsystem of claim 10 , wherein the controller is configured to receive the request to access data stored on the persistent storage device by one of: receiving a read request, receiving a write request, or receiving a garbage collection request.
16. The NVRAM-based storage subsystem of claim 15 , wherein the controller is configured to: delete, and without writing to the persistent storage device, the copy of the particular unit of data present on the NVRAM cache device in response to receiving the garbage collection request.
17. The NVRAM-based storage subsystem of claim 10 , wherein the controller is configured to:
based on determining that the particular unit of data is present on the NVRAM cache device, determine whether the copy of the particular unit of data present on the NVRAM cache device is in a non-updated state, wherein the copy of the particular unit of data present on the NVRAM cache device is in the non-updated state when the copy of the particular unit of data present on the NVRAM cache device is identical to the particular unit of data stored on the persistent storage device.
18. The NVRAM-based storage subsystem of claim 10 , wherein the controller is configured to:
based on determining that the particular unit of data is present on the NVRAM cache device, determine whether the copy of the particular unit of data present on the NVRAM cache device is in an updated state, wherein the copy of the particular unit of data present on the NVRAM cache device is in the updated state when the copy of the particular unit of the data present on the NVRAM cache device not identical to the particular unit of data stored on the persistent storage device.